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Design issues hamper 6 billion FPGA debut

Posted: 06 Dec 2012 ?? ?Print Version ?Bookmark and Share

Keywords:FPGAs? IP? licensing? embedded?

Achronix Semiconductor Corp. will have to delay sampling of its 6 billion transistor FPGA because of "design issues," the company's Chairman John Lofton Holt announced.

The HD 1000, the first in the Achronix family of FPGAs designated Speedster 22i HD and the first to be manufactured using Intel's 22nm process, was supposed to be out in the market by end of this year but instead will come out early 2013.

Despite the delay, Holt said he remains confident about the HD 1000's rollout early next year, insisting that the flagship FPGAs remain the company's core business.

The Speedster22i HD family are SRAM-based, fully-reconfigurable FPGAs offering a familiar fabric architecture consisting of synchronous look-up tables, flops, muxes, carry chains, memories and multipliers, according to Achronix. Integrated with a variety of high-speed data communications interfaces, the Speedster22i FPGAs are designed to work in networking and telecommunications equipment.

The delay, coming as Achronix is rolling out its strategy to enter the embedded FPGA IP business (disclosed several weeks prior to the product delay disclosure), could raise questions about where the eight-year-old FPGA company is headed. A fabless chip company entering the IP business is generally a long shot since the strategy requires an entirely new business model for a much tougher market.

IP licensing is an inherently long-term business. Before IP licensors can even think about royalties, licencees must first successfully design SoCs by using the licensed IP, then their chips must take off quickly when they hit the market.

Asked about it, the Achronix chairman laughed. "Yes, I know. The IP business tends to get people worried."

Holt added that Achronix is not altering its business model. "Our core business still remains in high-performance, high-density FPGAs."

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