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Key ADC specs for system analysis

Posted: 23 Jan 2013 ?? ?Print Version ?Bookmark and Share

Keywords:analogue-to-digital converter? transfer function? SAR-ADC?

Multiplexed circuits, handheld meters, data loggers, automotive systems and monitoring systems are the applications that perfectly fit 12bit analogue-to-digital converter (ADC) systems. In these systems, a 12bit ADC that produces 4096 possible digital outputs usually supplies ample information for most system designers. When accomplishing this level of digital output resolution, it is possible to use either a 12bit SAR or 24bit delta-sigma ADC. This article helps to determine the key specifications for ADCs, as you compare the performance of SAR and delta-sigma converter systems.

The first step to identifying the correct ADC is to inspect the respective product datasheet. Once you embark on this type of activity, you will find that the number of these specifications can quickly overwhelm you; especially if you are just learning the ropes about the ADC. Let's narrow down that list to a handful of the key characteristics and specifications by setting a few priorities, keeping in mind that we are working on a system as opposed to an individual device. If you want to go deeper, reference 1 gives you a summary of most of the primary ADC specifications and characteristics.

Several specifications can be critical in a particular application. However, for these systems one needs to know the following ADC characteristics:

???Basic transfer function
???Full-scale-input-range
???Number of bits
???Analogue and/or digital gain capability
???Power consumption
???Through-put timing
???Output noise

ADC transfer function, full-scale input range, number of bits
Theoretically, an ADC's ideal transfer function is a straight line with the input voltage on the x-axis and the digital output code on the y-axis. The practical ideal transfer function (figure 1) has a uniform staircase formation. Figure 1 shows the ideal transfer function of a 3bit ADC. Equation 1 describes the code width in this diagram (for an "n" bit converter):

(ideal code width) = FS / (2n) Eq. 1

Figure 1: Unipolar ideal ADC transfer function.

This ideal ADC relates all analogue inputs to a limited number of digital output codes. In figure 1, there are 23 or eight output codes. Given that the analogue input scale is continuous and the digital codes are discrete, this conversion process introduces a quantisation error.

If you increase the number of discrete codes (or increase the number of ADC bits), the corresponding code widths become smaller. Notice that if the desired number of output codes continues to be eight, the analogue input range decreases.

ADC gain capability
Analog and/or digital gain within the ADC circuit is sometimes obvious and other times not so obvious. For instance, a basic SAR-ADC does not have analogue gain capability. This is easy to know as long as you read the front page of the datasheet and examine the simplified ADC circuit diagram. On the other hand, some SAR-ADCs have internal programmable-gain-amplifier (PGA) circuits. This PGA function supplies an analogue gain inside the device. This is a convenient gain block, however, it is important to note that the number of bits do not change with PGA gain changes. The only visible change is the input range of the ADC and the code width (or LSB) voltage. As the PGA gain increases, the ADC's input range decreases.

If the converter has more that 12bits, it is possible to implement digital (or process) gain with the converter (reference 2). If you are using a 24bit delta-sigma ADC, you will find 4096 places in the output code that will produce 12 bits of codes. The number of output codes with a 24bit ADC is 224, or 16,777,216 codes.

Power consumption
In terms of power consumption, you can exercise power-down capability with SAR-ADCs. When the SAR-ADC is converting a signal, there is a power consequence. The SAR-ADC takes a "snap-shot" of the input analogue signal to produce one digital output code. When the SAR-ADC is not converting, the device goes into a sleep mode. This characteristic is useful in battery-powered applications.

The power consumption model of delta-sigma converters is different than the SAR-ADC. A delta-sigma converter acquires numerous samples of the input signal and combines those samples into one output code representation. During the time that the output is available, the converter continues to sample in preparation for the next output code. Delta-sigma converters do not have the convenient SAR-ADC, power-down function.

Throughput timing
Although the SAR-ADC and delta-sigma converter both transmit a serial output data stream that represents their conversion, the two devices have significant differences during their conversion times. A SAR-ADC samples the input signal and converts that one signal to a serial digital output. Figure 2 shows an example the conversion timing of a SAR-ADC. In this diagram, the throughput time includes the conversion time (tCONV) and a quiet time (tq). The converter transmits a serial 12bit stream of data at its output (SDO).

Figure 2: 12bit SAR-ADC conversion timing diagram using the ADC7886.

One-shot converter
One can view the SAR-ADC as a one-shot converter where the output data represents a single analogue sample.

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