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Synopsys boosts uptake of FinFETs

Posted: 25 Jan 2013 ?? ?Print Version ?Bookmark and Share

Keywords:FinFET? IP? 3D transistor? TCAD?

Synopsys Inc. has revealed what it says is a comprehensive solution for FinFET-based semiconductor designs that includes various DesignWare Embedded Memory and Logic Library IP, silicon-proven design tools from the Galaxy Implementation Platform, and foundry-endorsed extraction, simulation and modelling tools. It also includes TCAD and mask synthesis products used by foundries for FinFET process development, added the firm.

The 3D structure of FinFET devices represents a significant change in transistor manufacturing that impacts design implementation tools, manufacturing tools and design IP. Developed over a period of five years through engineering collaboration with leading foundries, research institutes and early adopters, Synopsys' FinFET solution claims to deliver production-proven technologies to manage the change from planar to 3D transistors. The full-line solution provides a strong foundation of EDA tools and IP needed to accelerate deployment of FinFET technology that offers improved power, performance and area for semiconductor designs, touted Synopsys.

Working closely with leading foundries for more than five years enabled Synopsys to gain design expertise and a deep understanding of IP architectures, stated the company. This close collaboration has resulted in the deployment of Synopsys' DesignWare Embedded Memory and Logic Library IP solutions on FinFET to key customers. The DesignWare Embedded Memory and Logic Library IP is architected to achieve the full benefits of the FinFET technology, delivering superior results in the areas of performance, leakage and dynamic power and low voltage operation, Synopsys noted.

The shift from planar to FinFET-based 3D transistors is a significant change that requires close R&D collaboration among tool developers, foundries and early adopters to deliver a strong EDA foundation. Developed through a multi-year collaboration with FinFET ecosystem partners, Synopsys' solution accelerates time to market of FinFET-based designs. The comprehensive solution includes IC Compiler for physical design, IC Validator for physical verification, StarRC for parasitic extraction, SiliconSmart for characterisation, CustomSim and FineSim for FastSPICE simulation and HSPICE for device modelling and circuit simulation, the firm indicated.

Synopsys has also been collaborating with foundries on the Sentaurus TCAD and Proteus mask synthesis products that enable foundries to optimise FinFET processing and design devices that meet the performance and leakage targets while mitigating the impact of process variation. The Proteus product line provides foundries with a comprehensive solution for performing full-chip proximity corrections, the company stated.





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