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Optoelectronics/Displays??

MIT Quad HD TV chip promises 4x resolution

Posted: 27 Feb 2013 ?? ?Print Version ?Bookmark and Share

Keywords:Massachusetts Institute of Technology? Quad HD TV? 4K? UHD? HEVC?

The chip's first trick for increasing efficiency is to "pipeline" the decoding process: A chunk of data is decompressed and passed to a motion-compensation circuit, but as soon as the motion compensation begins, the decompression circuit takes in the next chunk of data. After motion compensation is complete, the data passes to a circuit that applies the corrective data and, finally, to a filtering circuit that smoothes out whatever rough edges remain.

Pipelining is fairly standard in most video chips, but the MIT researchers developed a couple of other tricks to further improve efficiency. The application of the corrective data, for instance, is a single calculation known as matrix multiplication. A matrix is just a big grid of numbers; in matrix multiplication, numbers in the rows of one matrix are multiplied by numbers in the columns of another, and the results are added together to produce entries in a new matrix.

"We observed that the matrix has some patterns in it," Tikekar explains. In the new standard, a 32 x 32 matrix, representing a 32 x 32 block of pixels, is multiplied by another 32 x 32 matrix, containing corrective information. In principle, the corrective matrix could contain 1,024 different values. But the MIT researchers observed that, in practice, "there are only 32 unique numbers," Tikekar noted. "So we can efficiently implement one of these [multiplications] and then use the same hardware to do the rest."

Similarly, Juvekar developed a more efficient way to store video data in memory. The "naive way," he said, would be to store the values of each row of pixels at successive memory addresses. In that scheme, the values of pixels that are next to each other in a row would also be adjacent in memory, but the value of the pixels below them would be far away.

In video decoding, however, "it is highly likely that if you need the pixel on top, you also need the pixel right below it," Juvekar indicated. "So we optimise the data into small square blocks that are stored together. When you access something from memory, you not only get the pixels on the right and left, but you also get the pixels on the top and bottom in the same request."

The researchers are trying to reduce the power consumption of the chip even further to prolong the battery life of quad-HD cell phones or tablet computers. One design modification they plan to investigate, Tikekar added, is the use of several smaller decoding pipelines that work in parallel. Reducing the computational demands on each group of circuits would also reduce the chip's operating voltage.


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