Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

Design, verification IP aimed at Mobile PCIe

Posted: 11 Mar 2013 ?? ?Print Version ?Bookmark and Share

Keywords:PCI Express? M-PCIe? design IP? verification IP?

Cadence Design Systems Inc. has unveiled what touts as the first commercially available design IP and verification IP supporting the new Mobile PCI Express (M-PCIe) specification. The company added that the IP enables the development of products with both PC-class performance and extended battery life.

"M-PCIe helps boost mobile device performance by delivering best-in-class, highly scalable I/O functionality, enabling the migration of business apps to smartphones and tablets as they take on the role of primary computing devices," said Al Yanes, chair and president, PCI-SIG. "We are delighted that Cadence is enabling SoC developers to rapidly adopt M-PCIe by delivering IP and VIP products supporting this standard."

The Cadence M-PCIe IP and VIP solution enables the PCI Express architecture to operate over the MIPI M-PHY physical layer technology, extending the benefits of the PCIe I/O standard to low-power mobile devices including thin laptops, tablets and smartphones. Teaming the benefits of the PCI Express standard with the leading mobile physical interface (M-PHY) is expected to enable greater innovation in mobile devices as technology developed for the wired world is migrated to mobile platforms, indicated the company.

Article Comments - Design, verification IP aimed at Mob...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top