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ST, CMP team up to deliver 130nm CMOS process

Posted: 12 Mar 2013 ?? ?Print Version ?Bookmark and Share

Keywords:CMOS? silicon brokerage? H9A?

STMicroelectronics and Circuits Multi Projets (CMP) have revealed that ST's H9A CMOS process (at 130nm lithography node), which offers a large panel of analogue and digital devices, is now available for prototyping to universities, research labs and design companies through the silicon brokerage services provided by CMP. The diffusion of the silicon wafers will take place at the ST plant in Rousset, near Aix-en-Provence (France), the firms indicated.

ST is releasing the process technology to third parties as a foundry service for a well-established analogue platform and for new developments in the More than Moore applications such as energy harvesting, autonomous intelligence and home-automation integrated systems.

The introduction in CMP's catalogue of ST's H9A (and its derivative H9A_EH) process builds on the successful collaboration that has allowed universities and design firms to access leading-edge and previous CMOS generations including 28nm CMOS, 45nm (introduced in 2008), 65nm (introduced in 2006), 90nm (introduced in 2004) and 130nm (introduced in 2003) through the ST Site of Crolles. CMP's clients also have access to 28nm FD-SOI, 65nm SOI and 130nm SOI, as well as 130nm SiGe processes from ST.

The CMP multi-project wafer service allows organisations to obtain small quantitiestypically from a few dozens to a few thousand unitsof advanced ICs. H9A design rules and design kits are now available for universities and microelectronics companies and the first requests are already being answered. A run is forecast for September 2013 to carry the first contributions.

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