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Designing liquid-level measurement system

Posted: 02 Apr 2013 ?? ?Print Version ?Bookmark and Share

Keywords:1-Wire? DS1WM?

With the increasing popularity and diversity of 1-Wire devices, more engineers are facing the task of how to integrate a 1-Wire master into their systems. This document focuses on the DS1WM synthesisable 1-Wire bus master that can be implemented as a function block of an application-specific integrated circuit (ASIC) or field-programmable gate array (FPGA). The DS1WM core uses little chip area (~3470 gates plus two bond pads). It also generates the entire 1- Wire timing by hardware, reducing the initial software development time and cost. Thus the entire application software can be written in high-level language. Besides the 1-Wire communication signal DQ, the DS1WM also provides a control signal STPZ, which assists in meeting the power requirements of certain 1-Wire slaves and allows for large networks with many slaves or extensive cabling.

View the PDF document for more information.

Originally published by Maxim Integrated Products Inc. at as "Liquid-Level Measurement System Uses a Compensated Silicon Pressure Sensor and Precision Delta-Sigma ADCs".

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