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Software burden for 28nm SoC dev't doubled over 40nm

Posted: 24 Jun 2013 ?? ?Print Version ?Bookmark and Share

Keywords:SoC? software? process node?

The cost of developing the software to support 28nm silicon SoC is larger than the cost of designing the chip itself, says market research firm Semico.

While the cost of SoC design at the 28nm node is 78 per cent more than it was at the 40nm node, the cost of writing and checking the necessary software went up by 102 per cent. The software burden will increase close to double every year. Semico predicts a compound annual growth rate (CAGR) for SoC software development of 79 per cent through to the arrival of the 10nm chip manufacturing node. The cost to integrate discrete IP blocks used in contemporary SoCs is also rising showing a CAGR of 77.2 per cent.

The good news for chip developers, says Semico, is that the rate of chip design cost will be lower, with only a 48 per cent increase at the 20nm node compared with the 28nm node. They are expected to increase by a 31 per cent at the 14nm node and by 35 per cent at the 10nm node.

Because of the high software burden and the cost of integrating IP cores from multiple sources, the highest costs are seen in advanced multi-core designs that break in a new process node. Derivative SoC designs at the same process node are a fraction of the cost of those first-time designs.

At the same time novel designs that are designed for an established manufacturing node will show a marked reduction in cost over time. The costs for an advanced performance multi-core SoC design, continuously done at the 45nm node will experience a negative CAGR of 12.7 per cent by the time the 14nm process node becomes commercially available.

Semico estimates that are made in 20nm silicon that sells for $20 must ship 9.2 million units and achieve more than $180 million in revenue to breakeven.

- Peter Clarke
??EE Times

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