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Dow Corning boards Imec's 3D IC packaging initiative

Posted: 10 Jul 2013 ?? ?Print Version ?Bookmark and Share

Keywords:IC packaging? nano-electronics? 3D IC?

Dow Corning has joined the growing community of companies participating in advanced research on the development and broader adoption of 3D integrated circuit (IC) packaging technologies, spearheaded by nano-electronics organisation Imec.

By integrating multiple chips into a single package, 3D IC technology promises to reduce form factor and power consumption, and increase bandwidth to enable more efficient inter-chip communication for next-generation microelectronics devices. Yet, before 3D IC fabrication can see broader adoption, it will require innovative advances in materials and processing technologies. Dow Corning, which specialises silicon-based technology and innovation, believes the partnership with Imec will help the company to further refine their unique temporary bonding solution, says Andrew Ho, global industry director, Advanced Semiconductor Materials.

A thin silicon wafer on dicing

Figure 1: A thin silicon wafer on dicing frame after successful debonding from a silicon carrier wafer.

One of the key challenges Imec is tackling is the bonding of the device wafer to a carrier wafer, prior to wafer thinning, and the safe debonding of the thin wafer after completion of backside processing. This was Dow Corning's goal when designing its Temporary Bonding Solution, aims at simple processing using a bi-layer concept comprising an adhesive and release layer. The technology also enables room-temperature bonding and debonding processes based on standard manufacturing methods.

Together with Imec, Dow Corning will explore its temporary bonding CMOS-compatible solution for 3D Through-Silicon-Via (TSV) semiconductor packaging. The collaboration will aim to further expand the technology's ability to achieve simple, cost-effective bonding-debonding techniques compatible with standard manufacturing processes.

"We look forward to collaborating closely with our newest member organisation as we drive the next stage of 3D integration, and help ensure compatiblity of the proposed thin wafer carrier solution with advanced, sub-10nm CMOS device technologies," said Eric Beyne, programme director 3D System Integration at Imec.

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