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Saving embedded PCB design with forensic tech

Posted: 17 Jul 2013 ?? ?Print Version ?Bookmark and Share

Keywords:printed circuit boards? PCB? package-on-package? AOI? solder?

Testing also becomes more challenging with these designs. For one, test pad points are shrinking. Therefore, finer test points must be defined to assure they are proper for flying probe or in-circuit test (ICT). These test points should be big enough to accommodate the probing of flying probe test, yet small enough relative to the size of an ever-shrinking board. The question for the PCB designer is where to place test points. Should they go on the component side where all the decoupling capacitors are connected or on the bottom side of the BGA? Considering that everything is shrinking C the board and packaging C test points are placed on the bottom side of the BGA most of the time since there's little real estate left.

This also means creativity plays a major role in these designs. Instead of testing individual components at one time, like before, the PCB designer now has to design in a method whereby a module of the circuit can be tested from few test point locations; thereby the need of a vast number of test points is greatly reduced.

A further challenge is that passives continue to become dramatically smaller. For example, the newest 01005 package is half the size of the 2001, which is about the size of a grain of salt. The 01005 has to be machine placed; otherwise, there's no other way for it to be placed on a board or to be reworked at a later stage.

Forensics: the big spy glass for tiny defects
If there's an error or miscue after a design is complete and dispatched to assembly and manufacturing, forensics can uncover issues that traditional inspection passed.

Forensics is better known as "destructive inspection." It's destructive because a completed designed and assembled board is sacrificed and sliced open along with its component population so that inspectors can peer inside it via SEM and/or cross section image to start their detective work. Cross sectioning (figure 3) is a main player in this failure analysis. It provides the physical evidence of the failure mode and site location, as well as isolates suspected versus non-suspected devices.

Figure 3: Cross-sectioning provides the physical evidence of failure mode and site location, as well as isolates suspected versus non-suspected devices.

Figure 4: SEM reveals voids due to air gaps created inside the solder due to poor plating.

There are innumerable failure possibilities to check out. Forensics can take an extremely close up look at inter-metallic failures, for example. Those are the most troublesome when it comes to BGAs, meaning those failures create what are known as "intermittent connections".

Forensics also takes a good look at solder thermal fatigue when testing for solder joint failure. Solder thermal fatigue occurs in the field when the product is used in excessive heat, especially when it contains BGAs or flip chip devices.

Those fatigue cracks begin slowly and over time the solder gets detached from the surface of the board due to the excessive heat. This is especially true if the BGA isn't designed properly or if it's an analogue circuit and heat dissipation isn't incorporated in the board design. In some cases, there can exist a coefficient of thermal expansion (CTE) mismatch between packages that contributes to this failure.

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