Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Networks

Evaluating your design's high-speed interconnects

Posted: 23 Aug 2013 ?? ?Print Version ?Bookmark and Share

Keywords:Signal integrity? RF board? electromagnetic? SI? Universal Serial Bus?

The complete RF board, along with the SATA and USB connectors, is simulated using a FEM solver and then used as a model for transient analysis. You can optimise the complete design by properly characterizing the differential trace width, spacing and routing to obtain good performance in the desired frequency band. Figure 4 shows the system's return loss and insertion loss for all ports. In this case, the E-field values for the entire system can be very useful in detecting hotspots. These hotspots may be potential sources of EM radiation, which causes serious problems related to EMI compliance. Figure 4 (bottom) shows the FEM calculated E-field plots for the entire board.

Figure 4: Shown here are the complete RF board simulation results: (top) shows a plot of the return loss (middle) shows a plot of the insertion loss and (bottom) shows the plot of the EM E-Field on the entire board.

Post layout SI analysis
During the post-layout SI analysis, the waveform quality, timing and crosstalk for the system-level interface implementations (including connectors and RF board) are validated. Instead of using separate S-parameter blocks of connectors and the RF board for SI analysis, an integrated RF board along with the high-speed SATA and USB connectors are applied for channel simulation. SI analysis on the integrated system provides accurate answers and avoids error-prone and time-consuming measurements.

A channel simulator is used for SI analysis of the complete channel. The channel simulator accounts for crosstalk, encoding, equalisation, and other effects of interest to high-speed digital designers. The eye probe component output provides accurate analysis of eye diagram properties including mask compliance, BER contours, density, width, and height. Channel insertion loss is largely dependent on the system impedance profile, impedance mismatch and on the materials used. Crosstalk is created by inductive or capacitive coupling between signal paths. The results of the channel simulation are shown in figure 5.

Figure 5: These channel simulation results were obtained using a setup with a single TX_Diff component and no crosstalk effect in ADS. A pre-simulated EM model of the RF board with SATA and USB connectors was used. The system was optimised by placing decapacitors between the connectors and the differential trace for the best eye diagram (top) and timing bathtub curve (bottom).

Signal integrity analysis of high-speed digital applications poses a number of challenges, especially when high-speed and high-density connectors (e.g., SATA and USB) are involved. Hybrid EM simulation, which enables simulation of connectors or other 3D components with the complete RF board, now offers a viable way to overcome this challenge.

In the case of the SATA to USB data transfer module, SI analysis results were obtained for the integrated system over a frequency range from 0 to 5GHz. The eye diagram and bathtub curves were optimised at a data transmission rate of 5Gbit/s using decapacitors.

By integrating the system, circuit and EM simulators, the traditionally complex problem of SI analysis was greatly simplified. Not only did the approach yield accurate results, but a reduction in the design cycle time was also realised. This process can be easily leveraged for SI analysis of other complex systems.

About the author
Anil Kumar Pandey obtained Master degree in Microwave Engineering from the Institute of Technology. He has 10 years' experience in RF, Microwave and Antenna Design. Currently he is working in Agilent Technology as Expert R&D Engineer. His working area are Antenna Design for different application, RF & Microwave components design, High speed digital design and Signal Integrity , EMI/EMC analysis, Multi-technology based design, Electronic Design Automation tools and Electromagnetics solvers. Before joining Agilent he worked 4 year as Scientist in Indian Space research organisation (ISRO); there he worked on a wide range of projects for communication satellites.

To download the PDF version of this article, click here.

?First Page?Previous Page 1???2???3

Article Comments - Evaluating your design's high-speed ...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top