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Choosing the right RTOS scheduling algorithms

Posted: 10 Sep 2013 ?? ?Print Version ?Bookmark and Share

Keywords:real-time operating system? RTOS? FCFS? VisualSim Architect? Preemption?

Figure 4 represents the simulation task plot, Task ID vs Simulation time. Here we have considered three different tasks, Task 1, Task 2, and Task 3. Task 1 starts at 0.0 ms, Task 2 starts at 2.0 ms, and Task 3 starts at 4.0 ms. The Round Robin time slice we have given is 2.0 ms. Accordingly each task is provided with 2.0 ms of equal proportion of time slice. We have provided Task processing time for all tasks as 3.0 ms.

As you can see in figure 4, Task 1 has divided into 2 sections, the first half is provided with time slice of 2.0 ms and the remaining 1.0 ms is performed at a later time after completion of Task 2 time slice of 2.0 ms. Task 3 is supposed to start at 4.0 ms but is pushed to 5.0 because of Task 1. If we look at the Task 2, the first part of the processing is carried out from 2.0 to 4.0 ms, and the remaining 1.0 ms will be performed during 7.0 to 8.0 simulation time.

Figure 4: Round robin.

VisualSim Architect provided us a package that included scheduling algorithms, analysis tools, and traffic generators. These allowed us to set up the system quickly and conduct hundreds of such experiments with different values of variables, and a number of additional variables. Some of the other scheduling mechanisms include First Come First Served, First Come First Serve + Preemption, Round Robin, Priority Based, Credit Policy, Weighted Round Robin, and a framework for proprietary scheduling algorithms.

As noted in the online web version, using VisualSim Architect we assembled the model that included system traffic; hardware elements like processor, DSP, Memories, DMA and Bus; and probes to capture all the relevant design metrics. VisualSim's libraries of standard hardware and software components, flow charts defining the behaviour, traffic models, and prebuilt analysis probes allowed us to focus on the analysis. That allowed us to leave the mathematics to the underlying engine to define and analyse unpredictable behaviour.

Modelling an embedded system to choose the right scheduling algorithm at the higher abstraction level model ensures greater flexibility in evaluation, can identify error conditions that would be hard to find downstream, and determine what is feasible with the available resources.

The selection of the right RTOS scheduling depends on the application and activities of the tasks to be scheduled. There are many scheduling algorithms from which to choose. But in our analysis we found that having many smaller tasks without preemption provided the best overall performance. This also allowed us to provide a higher priority for some tasks and allow preemption for only extremely rare tasks.

System modelling and simulation were critical in our analysis of the timing and was a key driver in selecting the right scheduling algorithm. Using this system-level analysis, we found that a full-blown RTOS was not a requirement and we could get better performance at a lower cost with a focused scheduler.

Note: The author provides an executable web version of the project where users can visualise the setup of the software processes and definition of the hardware platform. Users can also modify attributes, run simulations, and view the resulting analysis.

About the author
Ranjith Adiga (K R) is an EDA Application engineer, specialising in VisualSim system-level products at CMR Design Automation in Bengaluru, India. He has many years of expertise in system level modelling, simulation, and development. Mr. Ranjith has been involved in various system-level model development projects with the defence sector, aerospace corporations, and multinational semiconductor companies in India. He completed his MS in Electronics from Kuvempu University and a Diploma in FPGA design and verification.

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