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Avoiding scope errors (Part 1)

Posted: 02 Oct 2013 ?? ?Print Version ?Bookmark and Share

Keywords:oscilloscopes? sample rate? bandwidth? oscillator? CMOS?

The engineering community employs oscilloscopes more than any other piece of equipment, and yet many of the published results are questionable at best. Some errors are very common, and so we can eliminate a great deal of bad data by considering a few simple, but key points. This first part of a four-part series covers: insufficient bandwidth and/or sample rate.

The majority of engineers only have one oscilloscope on their bench. This is likely due to cost. While this may be acceptable, it presumes that the one oscilloscope meets all of our time-domain measurement requirements. Let's consider just a few of the scenarios that a typical engineer might face, and evaluate the bandwidth and sample rate required for the measurement.

Case 1: A simple high-speed CMOS logic gate
It is rare that any electronics these days would not include some type of digital gate or buffer. In this simple case, we are using a NC7SZ04 Tinylogic inverter gate, connected to a 10MHz SMD oscillator. The 10MHz is not significant. It is just a handy example. In using such a logic gate, we might consider the rise and fall time of the gate. The rise will impact the noise generated on the supply voltage rail and will also provide some guidance on the narrowest glitch we might need to capture if we needed to troubleshoot the circuit.

Most engineers might not guess how fast these very common gates are. In this first measurement, we connected a 30-Ohm resistor and a 0.01-uF capacitor in series with the output of the logic gate. The scope is then terminated into 50 Ohms allowing it to perform at its maximum performance level. In this measurement, we are using a LeCroy 640Zi 4GHz oscilloscope. The rise and fall time are shown in the oscilloscope measurement in figure 1 with a 40 GS/s sample rate.

Figure 1: The actual rise and fall time of the logic gate output (399 pSec/518 pS).


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