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Dual UART IP Core features deeper FIFOs, extended baud rates

Posted: 03 Oct 2013 ?? ?Print Version ?Bookmark and Share

Keywords:Digital Core Design? IP Core? DUART? microprocessors? microcontrollers?

Digital Core Design (DCD), a provider of IP Cores for use in ASIC, ASSP, and SoC designs, recently unveiled the D2692, a dual universal asynchronous receiver/transmitter (DUART) IP core.

DCD specialises in taking popular microprocessors, microcontrollers, and peripheral devices, and re-engineering them to have new architectures. Although these new implementations are faster and consume less power, they are always 100 per cent software compatible with their predecessors.

While maintaining compatibility with the well-known SC26C92, SCC2692, and SCN2681 DUARTs, the D2692 offers additional features, including deeper FIFOs, a watchdog timer for each receiver, support for extended baud rates, and programmable transmitter and receiver interrupts.

Further information regarding DCD's D2692 dual UART IP core can be found here.

- Max Maxfield
??EE Times





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