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Mentor verification solutions target HDMI 2.0 products

Posted: 11 Oct 2013 ?? ?Print Version ?Bookmark and Share

Keywords:HDMI 2.0? emulator? verification?

Mentor Graphics Corp. has rolled out hardware and software solutions to speed up the verification of High-Definition Multimedia Interface (HDMI) version 2.0 products. The Mentor verification solutions allow designers to test the HDMI 2.0 devices integrated on their SoC designs, and develop and stress-test their software and hardware with billions of verification cycles before silicon is available.

The first product is iSolve Multimedia, which has a 'plug-and-play' hardware interface to the Veloce family of hardware emulators. It provides a cost-effective and efficient solution to verify HDMI 2.0 devices (chips for set-top-boxes, digital TVs, PCs, tablets and mobile phones) in the SoC design. Users can create compliant HDMI 2.0 frames on-the-fly from industry-standard files, such as AVI or other file formats, and exercise their design with thousands of HDMI frames. High-performance, graphical analysis tools help to identify problems related to the digital video/audio output from the user's design, and perform debug that is critical in determining the functional correctness of the SoC. This hardware solution adds to the existing iSolve family of solutions for the accelerated verification of applications such as networking, embedded systems, wireless, storage, and multimedia devices.

Complementing the iSolve solution is the Mentor Veloce VirtuaLAB Multimedia for HDMI 2.0 that provides the same level of functionality for HDMI users as the iSolve solution, but in a pure software-based environment or "virtual lab" environment, stated the firm. This option increases the flexibility of using the Veloce emulator for multiple users worldwide, where they can use the Veloce emulator as a data centre resource and not be concerned with hardware setups.

The final product delivered for HDMI 2.0 is a verification IP (VIP) solution. This delivers both a simulation environment, using the Questa functional verification platform, and accelerated simulation environment using the Veloce emulator for the verification of HDMI 2.0-compliant devices. It generates the appropriate stimuli for the Design-Under-Test (DUT), passing packets, or transactions, of protocol data for tests. The VIP solution also provides a high-level application programming interface (API) for use with multiple test-bench environments such as SystemVerilog/UVM and SystemC, and provides example test environments that can exercise the emulated HDMI 2.0 device. All solutions are also compatible with the previous HDMI 1.4 standard for user flexibility.

The HDMI 2.0 products deliver use modes with traditional in-circuit emulation (ICE), virtual lab emulation and high-performance, transaction-based acceleration.

All three solutions are available for deployment at customer sites effective immediately.





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