Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Memory/Storage
?
?
Memory/Storage??

Synopsys non-volatile memory IP claims to cut power by 90%

Posted: 22 Nov 2013 ?? ?Print Version ?Bookmark and Share

Keywords:Synopsys? non-volatile memory? RFID? NFC? mobile system?

Synopsys Inc. has introduced its DesignWare AEON multiple-time programmable (MTP) ultra low-power (ULP) non-volatile memory (NVM) IP. The offering is intended for the stringent power and area requirements of wireless and RFID/NFC ICs.

The IP claims to cut power consumption by up to 90 percent compared to the previous generation by offering a single-bit read capability, read operation down to 0.9V and peak current under 10uA during erase and programming. Reducing power consumption extends battery life in mobile systems, increases RFID/NFC tag sensitivity and reduces tag size by allowing the use of smaller antennas.

The DesignWare AEON MTP ULP NVM IP offers single-bit read capability to give designers additional flexibility in setting power/timing tradeoffs, which can depend on the peak current and read time requirements. To reduce factory programming test costs, the IP includes a fast programming mode that cuts programming time by 70 percent compared to the previous generation. With up to 100,000 write cycle endurance, RFID and NFC designers using DesignWare AEON MTP ULP NVM IP can have confidence that their products can be reprogrammed many times for extensive reuse. In addition, the IP integrates critical high-voltage generation and distribution circuitry to simplify integration and reduce system cost and area.

DesignWare AEON MTP ULP NVM IP is available in the 180nm process node.





Article Comments - Synopsys non-volatile memory IP clai...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top