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Shrinkage rate in NAND flash exceeds Moore's Law

Posted: 29 Nov 2013 ?? ?Print Version ?Bookmark and Share

Keywords:NAND flash? DRAM? manufacturing?

The computing world is in a time of flux. We're moving into the post-PC era as tablets and smartphones supplant laptops. Though a place remains for spinning-disc media and DRAM, NAND flash memory is assuming an increasingly important role, not just in storage, but also in embedded systems.

For proof, look no further than the numbers. A new TechInsights report says NAND flash revenue should reach $30 billion this year, surpassing DRAM revenue for the first time. Interestingly, the report predicts a drop in average selling price but cites that as a growth driver-lower prices increase market penetration, opening the way for new applications that trigger enough growth to offset the revenue differential.

So how are manufacturers lowering prices? In part by controlling the cost of materials and manufacturing, which is where process nodes come into play. Increasing storage density would seem to benefit end users by delivering more memory capacity in the same-sized package, but the real benefit is that it reduces manufacturing costs. As a result, fierce competition is under way among manufacturers to drive process nodes as low as possible.

Shrinkage rate in NAND flash exceeds Moore's Law

Indeed, the shrinkage rate in NAND flash memory now exceeds Moore's Law. The problem is that the laws of physics dictate that films can only get so small before nasty problems like cell-to-cell interference and bit flips crop up. As manufacturers move into the final generations of memory shrinkage, we thought it was a good time to do a roundup of current process nodes.

NAND flash pioneer Toshiba debuted its 19nm NAND flash last year and swung into volume production over the summer. The chips feature a two-bit-per-cell architecture for a total of 64 Gb of capacity in a 94 mm2 device and can deliver write speeds as high as 25MB/s. Toshiba recently announced a family of embedded NAND flash memory modules aimed at smartphones, video cameras, and tablets. Densities range from 4GB to 128GB. The company also has three-bit-per-cell chips under development.

Meanwhile, Samsung is working with what it calls a "10nm-class" triple-level-cell NAND flash chip. This is just another way of saying 1x nm NAND flash; in this case, TechInsights lists the Samsung chip as being fabricated using a 16-nm process. Samsung is shipping 128-Gb chips for use in solid-state drives aimed at the enterprise storage market. By leveraging its 20-nm production lines for the new chips, the company expects to boost manufacturing yields by roughly 30%. Based on the toggle DDR 2.0 interface, the devices support 400MB/s data transfer rates.


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