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Moore's Law may not be a dead end after all

Posted: 17 Dec 2013 ?? ?Print Version ?Bookmark and Share

Keywords:Broadcom? Moore's Law? electronics industry? circuit design?

Henry Samueli, co-founder of Broadcom, has shared surprising insights and possibilities about what many consider as the worst possible thing that could happen to the electronics industry. Moore's Law, according to him, is slowing down, and its end appears to be in sight. But he also stated that it poses a lot of opportunities for Broadcom.

Back in May he became the first semiconductor executive I ever heard frankly acknowledge this increasing apparent reality. Then he added a new head-snapping twist: From our perspective [this situation] gives us more breathing room to be clever about design. Most people run to the current process node as fast as they can. That's going to change. Instead of running to the next node, you will come up with new architectures and circuit designs, and that will create more opportunities on the design side, bringing more value to a company like Broadcom.

Laughing, I asked, "So Moore's Law is ending... and that's a good thing for Broadcom?"

We both laughed. "Yes, in a way it is," he said.

While Samueli argues Broadcom could expand its slice, the overall pie will slow its pace of growth, a prospect that quickly sobered up our conversation.

There will be a slowdown in rate of innovation in products [end users] buy. The smaller/cheaper/faster [dynamic] is definitely going to slow and potentially 15 years from now even stop, then it's a matter of leveraging the system as a whole rather than the end product.

Samueli is not alone in speaking frankly about this trend. In a keynote at the International Electron Devices Meeting (IEDM), one of the top gatherings on the future of semiconductors, Geoffrey Yeap, VP of technology at Qualcomm, painted a similar picture.

Chipmakers face "more material/process cost and design complexity... to meet product specifications for low leakage/power and higher performance," he wrote in a paper for the IEDM proceedings.

"This positive feedback loop drastically accelerates the increase in die cost ($/mm2)... making area scaling less attractive," Yeap wrote. "We are getting dangerously close to this inflection point as the scaling box with four sides of speed, density, power, and cost is becoming smaller as we march towards the 7nm node."

Engineers are researching several areas in hopes of countering or at least slowing down the trend. They include new backend materials and processes, multiple 3D chip stacking efforts and industry collaboration on extreme ultraviolet lithography, 450mm wafers, and design optimizations of all sorts, Yeap wrote.

In our interview, Samueli provided more detail on the situation.

All signs are Moore's Law is really slowing down. We don't have universal agreement, but all the data points we see show slowing down, and more important, beyond the 28nm node cost per function is starting to go up. You still get performance and power advantages, but you don't get cost advantages, and historically you got all three, so now we need to think twice about how to migrate to the next node.

He predicted the 28nm node will be "long lived... It may ultimately become the cheapest node available if you don't have to have the megachips."

Broadcom does have some of those megachips with its Ethernet switches and XLP network processors. It's skipping the 20nm node to employ the 16nm process that has the same feature sizes but adds the 3D transistor structures known as FinFETs.

Beyond that, the 10 nm has some process before the limits of physics loom large. "It's looking like 7-5nm is close to end of the road, at that stage you have about 10 silicon atoms in a gate of a transistor."

In another IEDM keynote, academic researchers gave a progress report on one alternative to today's CMOS process. But their paper on advances making gigahertz-class transistors with graphene also noted they still don't see their way around the current obstacles to making the process commercially viable.

"Being only one atom thick, graphene has a potential to overcome state-of-the-art Si and III-V semiconductors in high-frequency transistors at the ultimate scaling limits," they wrote in their paper. However, "there are several figures of merit that should be considered before GFETs can be used in realistic multi-stage electronic circuits, instead of InP heterojunction bipolar transistors."

Ring oscillator

Researchers showed a ring oscillator made in graphene at IEDM.

Broadcom, like Qualcomm, is keeping a weather eye on 3D stacks as one way to deliver at least a one-time boost. For its part, Broadcom is working with partners on a plan to put its networking chips on a silicon interposer next to silicon photonics devices to gain an edge in speed.

Longer-term, fast-moving digital designers could come to resemble their cousins in analog technology. "They all use older legacy technologies that work just fine, they crank out tons of products," Samueli stated.

- Rick Merritt
??EE Times

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