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Avoiding electrical overstress in electronics

Posted: 30 Jan 2014 ?? ?Print Version ?Bookmark and Share

Keywords:Electrical overstress? EOS? electrostatic discharge? power supply? electromagnetic interference?

Consider the 3.3V protection circuit. When the external voltage is between 1.8 V and 3.3 V, the P-MOS Q4 conducts because the voltage on the gate terminal is less than VTH with respect to drain (P-MOS will switch off if the voltage on the gate terminal is more than VTH with respect to Drain). When the external power supply exceeds 3.3 V, the P-MOS Q5 starts conducting. This eventually turns off P-MOS Q6 at 3.6 V, protecting the device from over-voltage. When a reverse voltage is applied across the protection circuit from an external source, Q4 P-MOS will turn off, thus protecting the device from reverse voltage. The circuit behaves as a bidirectional protection circuit i.e. it allows any voltage from the device to pass to the external world, where as limits the voltage that is entering the device.

The selection of a PMOS device depends on three main requirements: the minimum input voltage that the circuit has to pass, the maximum input voltage that the protection circuit has to withstand, and the series voltage drop across the protection circuit. Suppose the minimum input voltage of the device is 1.8V and maximum input voltage up to which the circuit has to protect is 10V. The PMOS device selected should have VTH less than 1.8V and the Maximum VDG should be more than 10V. To keep the series voltage drop across the protection circuit to a minimum, the on resistance RDS of the PMOS device has to be as low as possible.

The selection of the series resistor R4 and Zener diode combination (figure 7) depends on the cut-off voltage at which the protection circuit blocks the external input voltage. When the input voltage is increased to the Zener break down voltage (Vz), the voltage across the resistor R4 will be nearly zero as Zener will not be conducting ideally. When the input voltage is more than Vz volts, the voltage across resistor R4 starts increasing. When the voltage across the R4 reaches Vth of Q5-PMOS, the Q5 PMOS switches ON, thereby increasing the voltage across R5. This makes the Q6 P-MOS turn off, thus breaking the connection from the external input. Therefore, the Zener diode breakdown voltage and the Vth of the PMOS determine the voltage at which the external voltage is cut off; i.e., VCUT-OFF = VZ + VTH.

Say we need the protection circuit to cut-off at 5.6V Then VZ= VCUT-OFFVTH. Considering a P-MOS with a VTH voltage of 1.8V, we have VZ as 5.6V-1.8V= 3.8V. The combination of resistor R4 and Zener should be such that when an external input of 5.6V is applied, the voltage across VZ has to be 3.8V. Since the Zener diode is not ideal, we need to choose a Zener diode that has VZ greater than 3.8V like 4V or 4.3V. To determine an approximate value of resistor, we read the V-I curve of the Zener diode and check what the current passing through the Zener is when the voltage across the Zener diode is 3.8V. If it is 1mA when the voltage across the diode is 3.8V, then the maximum resistor value of R4 is = (5.6V-3.8V)/1mA = 1.8k. A good practice for choosing resistor R4 is to use a variable resistor and Zener combination and tune the resistor to get a required cut-off voltage.

Figure 7: V-I curve of the Zener diode (source diode datasheet).

Conclusion
The above circuits were tested for the accuracy in field operation and were found to be successful in protecting the device form over voltage, reverse voltage and over current scenarios for devices working at 3.V and 5V. Following are the basic comparison of the protection circuits to enable user in selecting an ideal protection for their design.

About the authors
Pavankumar Banakar is a Systems Engineer Senior in Development Kits Team of Cypress Semiconductor, Bangalore since 2011. He has couple of years of industry experience in Embedded System Development and System Validation. He completed his Bachelor of Engineering from R.V College of Engineering, Bangalore, India.

Rinku P Mathew is a Systems Engineer Senior at Cypress Semiconductor with eight years of industry experience with microcontrollers and embedded applicationsÿHe is currently pursuing his MS from Manipal University, Bangalore, India.

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