Schematic guidelines for MMPF0200 power mgmt IC

This document contains guidelines for schematic entry using the MMPF0200. Freescale analogue ICs are manufactured using the SMARTMOS process, a combinational BiCMOS manufacturing flow that integrates precision analogue, power functions and dense CMOS logic together on a single cost-effective die.

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Originally published by Freescale Semiconductor at www.freescale.com as "Schematic Guidelines for the MMPF0200".