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Cadence OrbitIO system enables planning, route optimisation

Posted: 22 May 2014 ?? ?Print Version ?Bookmark and Share

Keywords:die-package? interconnect? system planner? OrbitIO? Cadence?

Cadence Design Systems, Inc. has debuted a multi-fabric interconnect planning and optimisation solution that promises to reduce die-package interconnect planning time from weeks to days, as well as the time to converge on the physical interface between the die and package by up to 60 per cent.

The OrbitIO system planner system planner unifies silicon, package, and board data in a single-canvas environment where assignment and connectivity scenarios are derived and evaluated in the context of the complete system. Full system visualisation and a unified data model enable rapid exploration and propagation of changes to adjacent fabrics, providing instantaneous feedback on their system-wide impact.

The platform is targeted at system architects responsible for developing the die-to-package interface, and coming up with the optimal combination of bump/ball configurations and net assignments. It enables fabless semiconductor and systems companies to evaluate package route feasibility and to communicate a route plan to their package design resources, whether it's an internal group or an outsourced assembly and test (OSAT) provider.

Die planning

Figure 1: Rapid die planning and assessment. Source: Cadence

One of the key features of the platform is the ability to define and evaluate a route plan, then to communicate those results to SIP-XL for implementation. It includes a route engine that quickly generates escape routes from bumps and balls pads to help evaluate layer requirements and assignment quality.

Route sequencing

Figure 2: Route sequencing and feasibility. Source: Cadence

Other features include: multi-fabric interoperability, system construction, big picture planning, pin planning and management, logic definition and management, connection optimisation, and interface definition.

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