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Power tip: High-to-low in synchronous boost

Posted: 03 Jun 2014 ?? ?Print Version ?Bookmark and Share

Keywords:synchronous buck regulator? boost regulator? FET? MOSFET? diode?

Many papers out there describe the switching waveforms in a synchronous buck regulator. However, there are only a few for the boost.

When we examine the boost, we find that the laboured switching transition is when the high-side FET transitions from on to off and the low-side FET transitions from off to on. We find the switch node gets a "free-ride" with the low-to-high transition. Basically, the laboured transition is interchanged when compared to a synchronous buck.

Figure 1 shows the boost converter we used to generate the waveforms shown in subsequent figures. It takes a 5V input source and steps it up to a 12V/50-watt output. The converter uses an IC specifically designed for the synchronous boost topology. It includes timing to minimise the body diode conduction in the high-side switch; provides gate drive circuits for fast, low-loss switching; and provides for feedback control of the output.

Figure 1: Adding synchronous rectifier (Q1) to a boost converter improves efficiency.

Another key point in the circuit is the use of a very fast, low-resistance MOSFET, which also improves converter efficiency. The waveforms we will examine are for this converter operating in the continuous conduction mode with the current never reversing.

The circuit works by first turning Q2 on to build current in the inductor. Q2 is then turned off and the voltage across the inductor reverses until Q1 conducts, delivering energy to the output. For steady-state operation, the volt-seconds across the inductor must balance, which determines the simple relationship between duty factor (D), VIN and VOUT: Vout = Vin / (1-D)

Figure 2 shows the voltage measurements in the circuit during the low-to-high switch node transition. On the left, the low-side gate drive holds the low-side (LS) FET (Q2) on. The LS gate drive then transitions low, which turns the FET off. When the FET turns off, the switch-node is charged losslessly by the inductor until the body diode of the high side (HS) FET (Q1) conducts.

Figure 2: The boost converter switch node low to high transition is low loss.

After about 40 ns, the HS FET is turned on, which shorts its body diode. The significant losses that occur on this transition are the HS and LS gate drive losses and the HS body diode conduction. Interestingly, the FETs used in this design require relatively low gate drive power. They have one of the better figures of merit (the product of on-resistance and gate charge), which further augments the ability to use a low gate drive voltage, in this case 5V.

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