Xilinx SDNet cranks up programmability

Xilinx, Inc. introduced expanded programmability and intelligence from the control to the data plane with an environment that enables the design of the programmable data plane functions in softly defined networks. The platform includes functional specifications automatically compiled into FPGAs.

Even when designed into large volume applications, FPGAs are increasingly competing with ASICs and ASSPs, mainly for easy bug fixing during development, then to update hardware functions on the fly once deployed in an application.

The typical trade-off is mostly end-product cost versus design flexibility. Not only FPGAs are getting more cost-competitive with every new node, Xilinx is now promoting them as the only viable solution for what the company calls "Softly" Defined Networks, a step in flexibility that goes far beyond Software Defined Networks (SDN) as they are conceived today.

Figure 1: A conventional software defined network.

In contrast to traditional SDN architectures, which employ fixed data plane hardware with a narrow southbound API connection to the control plane as shown in figure 1, Softly Defined Networks are based upon a programmable data plane with content-intelligence and a rich southbound API control plane connection, as shown in figure 2.

Figure 2: A "softly" defined network.

By using FPGA fabric instead of ASICs or ASSPs for the data plane, Softly Defined Networks are flexible on both software and hardware counts, while enabling reconfigurable content-aware data pre-processing at wire speed.

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