Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Embedded

Accelerator boards buff TCP, UDP connection speeds

Posted: 03 Jul 2014 ?? ?Print Version ?Bookmark and Share

Keywords:TCP? UDP? offload?

Intilop releases 16K Concurrent TCP & UDP Session Hardware Accelerator ported to Xilinx VC 707 development board The Complete 'Full TCP and UDP stack' pre-ported and tested with their 6th generation industry leader '77ns TCP& UDP processing times and 95% TCP throughput,' Network Hardened, most reliable, mature and most widely adapted worldwide over the last 5 years.

TCP & UDP Accelerator boards are targeted towards the next generation of Cloud Computing, Data Center, Network Security, Telecomm and all other Hyper Performance Network Computing applications.

Intilop, Inc. launched a Virtex-7-based accelerator boards, which provides TCP & UDP hardware stacks whose cores can run without any CPU involvement. The development platform builds on Intilop's sixth generation of its 10G TCP & UDP full offload engines, which provide 16,000 simultaneous TCP and UDP connections and over 1.1GB/s per port regardless of the number of simultaneous or active TCP/UDP sessionspromising to deliver this performance with ultra-low latency and zero jitter (see 10Gbit TCP, UDP accelerators run up to 16,000 connections).

The throughput is said to be an achievement compared with other similar solutions that allegedly suffer major performance degradation when handling just 10 to 20 simultaneous TCP sessions. It also boasts an unprecedented TCP throughput of more than 95 per cent for large and small size payload data transfers on a 10G network, 8 to 20 times higher against standard TCP/IP software running network traffic which is the de-facto standard.

The whole SOC sub-system containing PHY & EMAC & TOE & UOE, only takes up less than 12K Slices/26K LUTs and 4MB BRAM. It also integrates a DDR-III interface, which allows automatic switching to DDR when running thousands of TCP/UDP sessions.

A complete FPGA board/development Kit is delivered with pretested TOE/UOE sub-system which allows customers to start using it right away. It expects to hasten the adaption of this technology in the vast array of next generation network connected devices. This new technology and platform offers many system level choices and flexibilities to customers in pretty much every vertical market who are building solutions for hyper performance networking applications.

A similar platform will be available with Altera FPGA devices in the near future.

image name

TCP & UDP Accelerator boards are targeted towards cloud computing, datacenter, network security, telecomm and all other hyper performance network computing applications. Source: Intilop

Article Comments - Accelerator boards buff TCP, UDP con...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top