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Utilising ARM Cortex-M based SoCs (Part 1)

Posted: 17 Jul 2014 ?? ?Print Version ?Bookmark and Share

Keywords:system-on-chips? ARM? Cortex M? SoC? PSoC?

Once a component is selected, the SoC design tool provides various configuration options that make it easy to match a wide variety of requirements. For example, figure 6 shows the configuration window of an ADC component that can be used to modify ADC properties to match the requirements of the embedded system.

PCB manufacture and assembly
Assembling the embedded system on the PCB becomes easier than before because there are fewer external components and hence a more compact hardware design. Internally, the components are connected through system interconnects which are used to route signals within the SoC, leading to a significant reduction in external connections.ÿFor example, PSoC uses global and local buses to route signals to/from I/O pins or internal blocks. System design by connecting components using the PSoC Creator IDE is similar to circuit design for simulation in software like PSPICE. Such flexibility allows developer to improve their designs easily and require less PCB re-design than conventional microcontroller design methodologies.

Figure 6: Configuration window of ADC component.

Firmware development
The software suite, used for designing a system with a specific SoC, provides ample resources to further simplify design for firmware designers. The software suite generally comes with built-in libraries of functions that can be directly used in the main design code. This reduces the work for firmware engineers to write device-level code. High-level functions also reduce code length and improve maintainability and readability of code.ÿARM-based SoCs have certain advantages for writing system firmware. Thumb-2 instruction technology, for example, produces firmware with a smaller memory footprint while still being able to keep the performance fairly constant. Apart from this, ARM is backed by efficient compilers that again optimise code to a higher degree.

Debugging the system
SoC vendors provide many debugging tools which help developers to zero-in on issues and solve them quickly. Generally, all SoCs have some type of integrated test/debug block which is used for the debugging purposes after hardware and firmware development is complete.

ARM-based SoCs are provided with a JTAG or SWD interface for debugging. JTAG-based SoCs support boundary scan testing on the device but it come at the expense of extra pins that could have been used for other purposes. Serial Wire Debug (SWD) is two-wire debug interface that can be used to perform all debug operations with the same speed and functionality as JTAG (minus Boundary Scan capability).

ARM SoCs also provide a Debug Access Port (DAP) that works with JTAG or/and SWD debug protocols. DAP contains debug and access ports. The Debug Port (DP) communicates with the external world and the Access Port (AP) gives developers access to SoC resources.

This block can be used for privileged access to the different on-board peripherals, including the processor. Apart from this, ARM provides multiple breakpoints (program flow) and watchpoints (memory access) to improve step-by-step debug of the design.

Let's go back to our previous example of gas sensing application and see how using a SoC in the system affects the design.

Figure 7: Functional block diagram of gas sensing system using SoC.

In this application, an SoC successfully replaces multiple on-board components. Internal SoC peripherals like an op-amp, ADC, PWM, and most importantly a processor core are used to develop the system with the least number of components on the PCB.

About the authors
Subbarao Lanka is a Staff Applications Engineer working in Cypress Semiconductors on Capacitive Touch Sensing applications since 2007. His responsibilities include defining technical requirements for new capacitive sensing controllers, developing new capacitive sensing controllers, conducting system analysis, debugging technical issues for customers, and technical writing.

Tushar Rastogi worked as Applications Engineer in Cypress Semiconductors. He has worked on PSoC based applications since 2012. His responsibilities include PSoC firmware programming, application development, technical support to customers with programming, and boundary scan related issues and technical writing.

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