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Enable low-cost isoSPI coupling for battery systems

Posted: 02 Sep 2014 ?? ?Print Version ?Bookmark and Share

Keywords:isoSPI? LTC6804? battery stack monitor? communications interface? energy storage?

Eliminating the high voltage requirement from the transformer magnetic design enables a number of relatively low cost options. One is to simply use appropriately approved Ethernet transformers. Another is to use other off-the-shelf low profile magnetics to reduce component height and part mass (reducing solder fatigue issues). These can be installed via surface-mount automated assembly methods like any other part, reducing production costs. A good candidate with these features is the discrete common-mode-choke (CMC), a transformer structure that is ordinarily used as a filtering element. Such parts are available up to 100H and carry approvals for use with automotive systems, making them desirable for isoSPI configurations as well.

Suitable CMCs are inexpensive. They can be quickly and easily produced as a machine-wound wire pair on a chip-sized ferrite form. Although isoSPI designs require somewhat higher inductance to effectively pass the longer pulse waveforms, adequate inductance can be achieved by using two of the chokes with windings in series to produce 200H. This has the additional benefit of forming virtual centre-tap connections, which are useful for common-mode biasing and decoupling functions.

Figure 3 shows an equivalent transformer model realised with two CMCs. The chokes indicated have an 1812 SMT footprint and bifilar windings (wires paired in construction), so primary and secondary are intimately matched minimising the leakage inductance and thus preserving high frequency performance. Types with physically separated windings have poor pulse fidelity due to excessive leakage inductance. The units shown have a 50V DC continuous rating.

Complete the picture
Figure 4 shows the complete circuit when using the L-C solution with CMCs as the transformers. Since the usual isoSPI application includes beneficial CMC filtering sections (integrated in the case of standard LAN parts), this circuit includes a recommended discrete part to retain that function. The coupling capacitors are high quality 10nF33nF parts with an 1812 footprint (630V or 1kV rating). Here, we assume that the LTC6820 is operating at chassis ground potential, so that biasing of the twisted pair is at a safe level.

Figure 4: Complete high voltage isoSPI point-to-point link.

In situations where both ends of the pair are at floating potentials, as in links between daisy-chained LTC6804-1 modules, then capacitors can be used at both ends of the link and the pair itself can be biased to earth potential with high value resistors to each line as shown in figure 5. Since the capacitors are in series in this situation, at least 22nF is recommended (33nF/630V type shown).

Figure 5: High voltage daisy-chain isoSPI link with isolated wiring.

Links between daisy-chained LTC6804-1s on the same board do not need any capacitor couplings since the potential is ordinarily figure 6) since the noise ingress without a cable is far smaller.

Figure 6: Daisy-chain isoSPI link for same-board interconnections.

High voltage layout
The printed circuit layout should include wide isolation spacing across the main dielectric barrier, namely, the capacitors. Figure 7 shows a placement example that provides good high voltage performance, with the blue regions representing frame ground (left side, with twisted-pair connector) and IC common (right side).

Figure 7: Suggested printed-circuit layout for high voltage performance at an isoSPI interface.

Note that the transformers must withstand HV transient potentials, so clearance is maintained there as well by using a 1206 size-biasing resistor. The HF decoupling capacitor and impedance termination resistor can be small parts (0602 size depicted).

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