Imagination unveils MIPS I-class IP cores

Imagination Technologies launched the first IP cores to combine a 64bit architecture and hardware virtualisation with scalable performance through multi-threading, multi-core, and multi-cluster coherent processing.

The MIPS I-class I6400 CPU family sets a new standard for mainstream 64bit processing in applications including embedded, mobile, digital consumer, advanced communications, networking, and storage—the broadest set of applications ever addressed by a single MIPS core family.

"This is the MIPS Warrior core that many have been waiting for," said Tony King-Smith, EVP marketing, Imagination. "As the industry moves towards instruction set neutrality, customers can now choose a CPU based on its technical superiority. The I6400 is more efficient, flexible, and scalable than the competition, and its feature set clearly lends itself to the needs of a wide range of next-generation applications including smartphones and tablets."

"We know that unique features like multi-threading provide significant advantages for many applications, and customers already using this technology agree. Unsurprisingly, we've already secured licencees for the I6400 across multiple markets," he added.

The I6400 will enable customers to set new price/performance points across markets. It achieves over 50 per cent higher CoreMark performance and 30 per cent higher DMIPS compared to leading competitors in its class. The I6400 can be implemented across a very wide range of performance, power, and area operating points and achieves high frequencies in aggressive implementations.

Moreover, the IP cores feature hardware multi-threading technology that supports up to four hardware threads per core. Imagination's proven MIPS multi-threading technology leads to higher utilisation and CPU efficiency. The simultaneous multi-threading (SMT) technology in the I6400, which builds on the decades of combined multi-threading expertise in the MIPS and Imagination engineering teams, enables execution of multiple instructions from multiple threads every clock cycle.

Preliminary benchmarking shows that adding a second thread leads to performance increases of 40 per cent to 50 per cent on popular industry benchmarks including SPECint and EEMBC's CoreMark, with less than a 10 per cent cluster area increase. Real-world applications such as browsers can also take significant advantage of multi-threading.

The I6400 joins the entire range of MIPS Warrior cores in incorporating hardware virtualisation technology, providing increased security and reliability, and enabling a unified security and virtualisation strategy throughout the system and across the entire SoC. As implemented in the I6400, this includes support for up to 15 secure/non-secure guests.

As part of Imagination's unified security strategy, designed to address the privacy and security needs of evolving and emerging connected applications, the I6400 core is optimised to support multiple independent security contexts and multiple independent execution domains. This leverages technology from Imagination and its ecosystem partners and can encompass other critical components of an SoC. The solution scales to support secure content delivery, secure payments, identity protection, and more across multiple applications and content sources.

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