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Sigma Designs unveils 4K HEVC STB chip

Posted: 15 Sep 2014 ?? ?Print Version ?Bookmark and Share

Keywords:Sigma Designs? STB? chipset? UltraHD? video service?

Sigma Designs Inc. has introduced the SMP8758 SoC intended to support UltraHD (4K)�resolution using HEVC (H.265) compression technology for next-generation STBs. According to the company, the SoC is engineered for OEMs, STB manufacturers and service providers who want to efficiently deliver advanced UltraHD (4K) video services with a feature-rich yet cost-effective platform.

Part of the HEVC-capable SMP8750 family of SoC solutions, the SMP8758 SoC supports HEVC's Main-10 profile allowing processing of up to 10bit colour samples accepted as the standard for 4K x 2K, over-the-top (OTT) and IPTV content, which results in more vibrant colour with smooth colour transitions.�It also includes 4K display processing with HDCP2.2 to ensure secure copy protection of high value 4K content.

A high-performance dual-core ARM Cortex A9 CPU and quad-core GPU provide the processing power and graphics performance required for the next generation of middleware such as Ericsson Mediaroom and Wyplay. Low power modes are compatible with the EU Code of Conduct and ENERGY STAR specifications for energy efficiency in consumer devices.

This latest addition to the Sigma HEVC chipset family leverages Sigma's technologies such as secure media processing, multi-format FHD and UHD video decoding, VXP display processing, and field-proven AV software core, noted the company. The SMP8750 family offers SoCs at multiple cost and performance combinations allowing each SoC to offer optimal performance to price ratio for multiple STB platforms from zappers, PVR capable, Hybrid-broadcast, IPTV STBs or streamer boxes. Future certification of CAS technologies and integration into the next generation IPTV/OTT ecosystem is planned.

The SMP8758 comes with a full software suite, including libraries and services packaged under both Linux and Android development kits for rapid development. The reference design kit incorporates managed power consumption circuits and associated software in the SDK and is developed to a minimal R-BOM to allow lower cost implementations with a lower memory subsystem footprint.

The chipset also demonstrates wide-ranging ecosystem compatibility, leveraging the widely supported ARM processing core, such as OpenGLES 2.0 drivers, HTML-5 browser engine and others to ensure that a range of existing applications will successfully run.�It includes various hardware and software extensions to support the creation of complete system solutions including global tuner/demodulator standards, wired and wireless network controllers, DTV middleware stacks and industry-leading IPTV middleware ports, such as Wyplay and OpenTV.

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