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Switch chip delivers more throughput at 3.2Tbit/s

Posted: 17 Sep 2014 ?? ?Print Version ?Bookmark and Share

Keywords:switch chip? datacentres? Cavium?

Cavium is challenging Broadcom, the dominant player in networking silicon, with its new Ethernet switch chip that uses a novel architecture to deliver the competing needs of both more throughput and more programmability for rapidly growing datacenters.

With up to 128 25 Gbit/s ports, the Xpliant Packet Architecture (XPA) will deliver up to 3.2 Tbit/s throughput, more than twice that of Broadcom's current high-end switch. At the same time, it claims it can support any emerging protocol in two months with a software update, a feat that takes traditional chips a hardware re-spin and as much as 30 months.

Today's largest datacenters are hungry for both more speed and flexibility. That's because they are trying to more accurately track and respond to changes in traffic at a time when their server clusters are growing by leaps and bounds.

Networking has become the main performance bottleneck and management nightmare both for big datacenters such as Amazon, Google, and Microsoft and service providers such as AT&T and Verizon. They see network virtualisation as a way to bust through the clogs and complexity, but the industry is inventing new protocols and overlays at a rapid pace in the competitive search for the best way forward.

Cavium Xpliant

Cavium claims its Xpliant switches will sport more throughput and flexibility than Broadcom's current Trident II.

In this environment XPA, "clearly offers a magnitude difference in how quickly people can respond to market changes," said Bob Wheeler, principal analyst with The Linley Group.

Xpliant is likely the first of many such efforts as network virtualisation takes hold.

Cavium won't say how its XPA chips work. It suggests they use low-level generic engines optimised for basic packet-processing jobs such as parsing streams of packets and creating lookup tables to track and modify them.

"It's essentially a table-drive architecture that's highly configurable but not programmable," said Wheeler. "Unlike network processors, there's no code in the data paththat would mean they would not hit their targets in density, throughput, and power."


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