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TSMC fabricates networking chip with 16nm FinFET

Posted: 26 Sep 2014 ?? ?Print Version ?Bookmark and Share

Keywords:16nm? FinFET? networking? TSMC?

Taiwan Semiconductor Manufacturing Co. (TSMC) said that it has successfully fabricated an ARM-based networking chip using its 16nm FinFET technology, in cooperation with HiSilicon Technologies Co. Ltd.

TSMC's 16nm FinFET process promises enhancements in speed and power, with leakage reduction. Compared with the company's 28nm HPM process, FinFET boasts 100 per cent increase in gate density, as well as 40 per cent faster operation at the same total power consumption, or over 60 per cent power savings at the same speed.

Having completed all reliability qualifications in November 2013, the 16nm FinFET technology has entered risk production with excellent yields, enabling TSMC and its customers to engage in more future product tape-outs, pilot activities and early sampling.

The new processor enables a significant leap in performance and power optimisation supporting high-end networking applications. By leveraging TSMC's production-proven heterogeneous CoWoS (Chip-on-Wafer-on-Substrate) 3D IC packaging process, HiSilicon integrates its 16nm logic chips with a 28nm I/O chip for a cost-effective system solution.

"This industry's first 32-core ARM Cortex A57 processor we developed for next-generation wireless communications and routers is based on the ARMv8 architecture with processing speeds of up to 2.6GHz," said HiSilicon President Teresa He. "This networking processor's performance increases by threefold compared with its previous generation...[and] can support virtualisation, SDN and NFV applications for next-generation base stations, routers and other networking equipment, and meet our time-to-market goals."

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