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Boost thermal management of electronic systems

Posted: 17 Oct 2014 ?? ?Print Version ?Bookmark and Share

Keywords:Thermal management? Compact Thermal Models? CTM? Detailed Thermal Model? SupIRBuck Regulator?

The model core is actually a thermal resistor network connecting the three virtual junctions, the top-mould and the lead-frame as shown in figure 3. Based on our thermal analysis for each of packages, the thermal resistor network is created using ANSYS Icepak general network project. The three junctions represent the three dies in the package.

Result and comparison
A sample model Computational Fluid Dynamics (CFD) simulation result obtained using ANSYS Icepak is presented below in the form of comparison between the CTM and the DTM of the package. The simulation was done with the package model mounted on a detailed PCB thermal model. The DTM of package used in the comparison had been validated by achieving good agreement with real test data.

Normal boundary condition comparison: The first comparison was made under normal condition of applications with an evaluation board, for different power loss distributions between Q1 and Q2, with and without a heat sink. In table 1, the power losses are 2.6 W for Q1 plus Q2, and 0.32 W for IC; the airflow velocity at the inlet is 200 LFM; the ambient temperature is 25C, where Q1/Q2 is the power loss ratio of Q1 over Q2. The heat sink is aluminium with dimensions of W x L x H = 13mm x 23mm x 16mm. The highest temperature among the three dies is taken as the junction temperature of the package, which is highlighted by the red values in the table. The blue values represent cooler device temperatures for a given simulation.

Figure 3: Model core of the compact thermal model.

The agreement between predictions of the CTM and DTM is excellent for all the three dies; with the largest junction temperature rise difference of only 0.8%, and the rest die temperature rise difference within 2%. When the power loss ratio Q1/Q2 changes from 1.6 to 0.625, the CTM temperature prediction accuracy almost remains the same. With or without heat sink, the CTM's prediction accuracy almost remains the same.

Extreme boundary condition comparison: The second comparison was made for some extreme conditions of solders under package. In figure 4 the two extreme cases are shown beside the normal solders: one is the solder below Q1 voided; and the other is the solder below Q2 voided. Solder voids could appear in mass production process, but the extreme void conditions happen only if the manufacturing procedures have certain problems. The voids make it difficult to transfer heat from the above die to PCB.

Table 1a: Temperature comparison of Q1.

Table 1b: Temperature comparison of Q2.

Table 1c: Temperature comparison of IC.

Figure 4: Solder pad void under package.


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