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Boost thermal management of electronic systems

Posted: 17 Oct 2014 ?? ?Print Version ?Bookmark and Share

Keywords:Thermal management? Compact Thermal Models? CTM? Detailed Thermal Model? SupIRBuck Regulator?

Table 2 gives the CFD simulation result comparison for these two solder void cases with and without a heat sink. In the comparison, Q1/Q2=0.625 for the all 4 cases.

In the comparison for extreme cases of solder voids, the agreement between the CTM and the DTM is also very good, with the largest junction temperature rise difference of 3.2%, and the rest die temperature rise difference within 1.4%.

Figure 5 shows that the PCB temperature distributions under the DTM and the CTM are almost identical. This also indicates that the CTM is a very good replacement of the DTM in thermal simulations.

Table 2a: Temperature comparison of Q1.

Table 2b: Temperature comparison of Q2.

Table 2c: Temperature comparison of IC.

Figure 5: PCB temperature under DTM (left) and under CTM (right) of case 3.

1) Different under-package PCB layouts: The second comparison in table 2 can also be seen as the comparison for extreme PCB layout cases, in which Q1 or Q2 has a very poor under package thermal cooling due to a poor layout design. So this comparison also shows that the CTM is independent of different PCB layouts.

2) Model validation and error estimate: The results show that the CTM is highly independent of boundary condition, and it is also independent of power loss distribution between Q1 and Q2. Therefore the set of practical condition used in this model comparison should be sufficient for the model validation in practical applications. Meanwhile the comparison can also be used as an error estimate reference.

3) Further simplification: The CTM of SupIRBuck Regulator reduces the number of elements by more than half compared to the DTM at the initial simulations. For end customer's system simulations, further simplification can be achieved by generating a two-resistor CTM. When PCB layout is completed, the distributed thermal resistance under package will be fixed; and then an accurate two-resistor CTM, specific for the PCB and a fixed die power loss distribution, can be generated by matching its result to that of the CTM of SupIRBuck Regulator.

The CTM of SupIRBuck Regulator shows a high level of boundary condition independence and die power loss distribution independence. It can predict temperatures of all the three dies accurately at a same simulation.

A set of practical boundary condition has been used for comparison between the CTM and the DTM of SupIRBuck Regulator. The comparison serves as model validation as well as an error estimate reference. A very good agreement has been achieved. For the normal boundary condition, the largest junction temperature rise difference is 0.8%; while for the extreme boundary condition, the difference is 3.2%.

The CTM of SupIRBuck Regulator has reduced the number of elements by more than 50% compared to the Detailed Thermal Model in initial CFD simulations. It can be used by end customers to generate the two-resistor CTM for further simplification in their system simulations.

The author appreciates technical review and feedback of ANSYS engineers and IR's Ramesh Balasubramaniam, as well as IR's Wenkang Huang's help in literature search.

[1] A. Bar-Cohen, T. Elperin, and R. Eliasi, "Theta_jc characterization of chip packages-justification, limitations, and future," IEEE Trans. Compon., Hybrids, Manufact. Technol., vol. 12, no. 4, pp. 724C731, Dec. 1989.
[2] Lasance C., Vinke H., Rosten H., Weiner K.-L., "A Novel Approach for the Thermal Characteri-sation of Electronic Parts," Proc. of SEMITHERM XI, San Jose, CA, pp. 1-9 (1995)
[3] JEDEC Standard "DELPHI Compact Thermal Model Guideline," JESD15-4, October 2008
[4] JEDEC Standard "Two-Resistor Compact Thermal Model Guideline," JESD15-3, October 2008

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