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Rising costs drive chip companies to alternate routes

Posted: 10 Oct 2014 ?? ?Print Version ?Bookmark and Share

Keywords:Morgan Stanley? silicon-on-insulator? M&A? FinFET?

The escalating cost and complexity of making chips is fuelling a record year for semiconductor mergers and a search for alternative technologies.

Chip companies executed 23 acquisition deals so far this year, more than the last two years combined, said Mark Edelstone, global head of investment banking in semiconductors for Morgan Stanley, during the IEEE S3S conference. Before the year is out, the total worth of M&A transactions will likely rise from $17.4 billion to nearly $30 billion, Edelstone predicted.

"It's really off the charts," he said, noting big combinations so far of Infineon and International Rectifier as well as Avago and LSI. "This trend will continue. It will be a very busy M&A landscape for next few years."

Semiconductor M&A deals

2014 has seen more semiconductor M&A deals already than the last two years combined, according to Morgan Stanley.

The low cost of capital is fuelling M&A across all industries, and the rising cost and complexity of making chips is pouring gas on the fire in semiconductors. It could cost $53 million to make a 20nm chip, up from $36 million for a 28nm part, and cost will take another leap with the 16/14nm node, Edelstone noted.

"It requires a really big market to make money on such an investment, and this will have a dramatic impact on how the industry evolves. The cost per gate is going up with the [16/14nm] FinFET generation, which changes the dynamics of the industry pretty dynamically; that tells you scale matters."

Several speakers agreed that costs per transistor are rising across the industry. However, Intel said in September its 14nm FinFET process will support lower costs per transistor.

The 14/16nm FinFET node represents the mainstream path forward, but fully depleted and extremely thin SOI processes also have an opportunity, said Michael Mendicino, a product manager from GlobalFoundries.

Some cost-sensitive mobile chips will avoid the 14 and 10nm FinFET nodes due to their costs, perhaps for as long as four to six years. SOI may offer an alternative that delivers the performance of 20nm bulk at a price closer to 28nm poly, but he noted pressures are driving down all bulk prices, too.

When pressed, Mendicino estimated the SOI alternatives might grab a 10 per cent share of the foundry business over the next three years, but emphasised that was only a guess. "Ask me again in three years," he quipped.

In a separate talk, Alice Wang, director of high-performance processor technology at Mediatek, made the case for sub-threshold design. The ambitious goal is to drive chips toward a minimum energy point where leakage and dynamic energy meet, a concept that emerged from her doctoral thesis and an ISSCC 2004 paper.

Engineers have been working toward that elusive goal for a year. Their on-going challenge is delivering chips that still perform meaningful work, reliably and with minimal overhead, Wang said.


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