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Samsung delivers 8Gbit 20nm DDR4 chips for servers

Posted: 22 Oct 2014 ?? ?Print Version ?Bookmark and Share

Keywords:DDR4? 20nm? DIMM? enterprise server? memory?

Samsung Electronics Co. Ltd started shipping its 8Gbit DDR4 memory and 32GB dual in-line memory module (DIMM), both manufactured using a 20nm process technology.

The Korean company said it had successfully expanded the use of its 20nm process from PC and mobile memory to enterprise server market with the new components, which it started producing earlier this month.

"Our new 20nm 8Gb DDR4 DRAM more than meets the high performance, high density and energy efficiency needs that are driving the proliferation of next-generation enterprise servers," said Jeeho Baek, VP of Memory Marketing at Samsung Electronics. "By expanding the production of our 20nm DRAM line-ups, we will provide premium, high-density DRAM products, while handling increasing demand from customers in the global premium enterprise market."

With its new 8Gb DDR4, Samsung now offers a full line-up of 20nm-based DRAM to lead a new era of 20nm DRAM efficiency that also includes the 20nm 4Gb DDR3 for PCs and the 20nm 6Gb LPDDR3 for mobile devices.

8Gbit DDR4 memory

The new module's data transfer rate per pin reaches up to 2,400Mbit/s, which delivers an approximately 29 per cent performance increase, compared to the 1,866Mbit/s bandwidth of a DDR3 server module, according to Samsung.

Beyond the 32GB modules, the new 8Gb chips will allow production of server modules with a maximum capacity of 128GB by applying 3D through silicon via (TSV) technology, which will encourage further expansion of the high-density DRAM market.

The new high density DDR4 also boasts improved error correction features, which will increase memory reliability in the design of enterprise servers. In addition, the new DDR4 chip and module use 1.2V, which is currently the lowest possible voltage.

Samsung's launch followed Intel's release last month of its Xeon E5-2600 v3 family, the first server processors from the chipmaker to support the new memory standard.

As adoption of DDR4 finally gains steam, memory testing equipment makers are also seeing increased demand for their tools.

Teledyne LeCroy is one of the vendors benefiting from the long-anticipated transition to DDR4. It recently announced its Kibra 480 Compliance Analyzer aimed at helping DDR memory developers, implementers and integrators verify and validate that their DDR memory design meets JEDEC compliance parameters.

The Kibra 480 supports either DDR3 or DDR4, but as the latter doubles the speed of its predecessor, compliance and validation become more difficult, said Roy Chestnut, director of technical marketing and programme manager for Teledyne's DDR protocol analyser product line.

DDR3 had its own set of issues in its early days, Chestnut said, and while the parameters of compliance are still about 90 per cent the same, as are many of the tests, the latencies are different. "Probing the signals is a little more difficult," said Chestnut, "so getting information out is more difficult."

In fact, he said, perfectly good memory can fail a compliance test if not configured correctly, so the Kibra 480 has been designed for quick setup with minimal configuration. It provides immediate feedback on violations and allows users to quickly validate that their memory system meets JEDEC timing compliance. It also allows rapid identification and elimination of any problem areas and can quickly identify timing issues associated with the JEDEC defined speed bins.

Chestnut said Intel's release of the Haswell-E server has sparked the uptick in interest for memory testing equipment since September, a phenomenon also observed by Tektronix, which recently released its LPDDR4 PHY layer test solution for high-speed, low-power memory interfaces for mobile devices.

(With inputs from Gary Hilson of EE Times U.S.)

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