High dynamic range apps: SAR vs sigma-delta ADCs

High-performance data-acquisition signal chains employed in industrial, instrumentation, and medical equipment require wide dynamic range and accurate measurements. The dynamic range of an ADC can be increased by adding a programmable-gain amplifier or operating multiple ADCs in parallel, using digital post-processing to average the result, but these methods can be impractical due to power, space, and cost constraints.

Oversampling allows an ADC to achieve high dynamic range at low cost, while also addressing tough space, thermal, and power design challenges.

Oversampling is performed by sampling the input signal at much higher rate than the Nyquist rate (twice the signal bandwidth) to increase the signal-to-noise ratio (SNR) and effective number of bits (ENOB). When the ADC is oversampled, the quantisation noise is spread such that most of it occurs outside the bandwidth of interest, resulting in increased overall dynamic range at low frequencies. The noise outside the bandwidth of interest can be eliminated using digital post-processing as shown in the figure. The oversampling ratio (OSR) is the sampling rate divided by the Nyquist rate. The improvement in dynamic range (ΔDR) due to oversampling is ΔDR = log2 (OSR) × 3 dB. For example, oversampling the ADC by a factor of four provides a 6 dB increase in dynamic range, or one additional bit of resolution.

Oversampling is inherently implemented in most sigma-delta (危-Δ) ADCs with integrated digital filters, where the modulator clock rate is typically 32 to 256 times the signal bandwidth, but 危-Δ ADCs are limited for applications that require fast switching between input channels. The SAR architecture has no latency or pipeline delays, enabling high-speed control loops and fast switching between input channels, and their high throughput rate allows oversampling.

Although both ADC topologies can accurately measure low-frequency signals, the power consumption of a SAR ADC scales with throughput rate, reducing power consumption by at least 50% as compared to 危-Δ ADCs, which typically consume a fixed amount of power. ADI's AD7960 5-Msample/sec, 18bit SAR ADC provides an example of high throughput rate with linear power scaling.