Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > T&M
?
?
T&M??

Worst practices for DDR memory testing

Posted: 14 Nov 2014 ?? ?Print Version ?Bookmark and Share

Keywords:DDR? probing? testing Chip interposers? solder-in probes? damping resistors?

Testing of dual data-rate memory (DDR) devices and/or modules requires careful application of some best practices for probing. There will also be cases where the use of chip interposers is called for. Heeding the advice provided in earlier posts on this topic will go a long way towards successful probing and testing.

With that said, there are also some things to watch out for. You can call them "worst practices" if you like. These "no-nos" can adversely impact measurement accuracy or even wreck your probing setup.

The first item on the list is less of a worst practice and more of an item that should be carefully considered. Many solder-in probes are equipped with damping resistors (figure 1). The question is whether these damping resistors should be removed when accessing signal lines through a chip interposer.

Figure 1: Damping resistors on solder-in probe tips.

If the probes terminate into the interposer without the damping resistors, one benefit is slightly better signal fidelity. AC response accuracy should improve by about 3% and DC gain accuracy goes up by about 4%. A comparison of eye diagrams of a DDR interface done with and without the damping resistors shows the marginal improvement (figure 2).

Figure 2: An eye-diagram comparison.

However, there are some disadvantages to removing the resistors. For one thing, this constitutes a modification of the probes. The old tips and resistors are removed and must be replaced with new leads. For another, once this modification has been done, the probes can't be used for other applications or for general-purpose uses until the resistors and leads are reattached to the probe-tip PCB.

It's worthwhile to note that most users do not remove the resistors. However, if you do choose to remove them, the leads should be replaced with #34-gauge wire extending 3 mm from the probe-tip PCB's edge. It's very important that you are careful about being consistent with installation of that #34-gauge wire if you're removing the damping resistors. If not, the result will be added inductance to the probe and inaccurate measurements (figure 3).

Figure 3: Use #34 wire to replace probe tips if you remove damping resistors.

Another thing to watch out for in DDR testing: Be careful about using square-pin or other adapters. Their use will adversely affect the rated bandwidth of your probe, thus reducing measurement accuracy. This won't be a problem, though, if you are testing low-speed-grade DDR signals.

Finally, referring back to our first post in this series on best practices for DDR testing, the solder-in probe interfaces are relatively fragile. Make sure you use hot glue, tape, probe holders/clips, some other sort of strain relief, or some combination of these techniques. Otherwise, even a small inadvertent impact to the target board could dislodge the connections. Using strain relief is practically mandatory for solder-in tips in any application, not just DDR testing. You soldered down those tips once, so why risk the need to do it again?

About the author
David Maliniak is with Teledyne-LeCroy.

To download the PDF version of this article, click here.





Article Comments - Worst practices for DDR memory testi...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top