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Clock synthesiser delivers 86fs RMS phase jitter

Posted: 21 Nov 2014 ?? ?Print Version ?Bookmark and Share

Keywords:8T49NS010? synthesiser? 40GE? 100GE?

Integrated Device Technology, Inc. revealed a 10-output synthesiser with ultra-low phase jitter for reducing bit error rates in current 40GE and 100GE data communication systems.

The 8T49NS010 synthesiser features an integrated fanout buffer/divider, removing the issues of additive phase jitter and noise coupling from oscillator to fanout buffer. It provides a high-frequency clock with 86fs RMS phase jitter over the standard 12kHz to 20MHz integration range. The synthesiser supports programmable configurations and output levels to satisfy the requirements of a variety of applications.

The device is configurable through an I2C serial interface and operates over an industrial temperature range. In addition to output power-down, it supports two logic levels for its differential outputs. The first provides an LVPECL output level with 750mV typical swing, while the second offers a similar swing and output level with no external DC termination.

The device uses an external fundamental mode crystal, alleviating the expense and availability issues associated with high-end oscillators.

8T49NS010

8T49NS010 block diagram. (Source: IDT)

IDT also released a family of induction wireless power transmitters for wireless charging devices, featuring a high level of programmability and flexibility while consuming ultra-low standby power to meet Energy Star requirements. (See Wireless power transmitters support WPC, PMA standards)





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