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PCIe fanout buffer eases server, motherboard designs

Posted: 09 Dec 2014 ?? ?Print Version ?Bookmark and Share

Keywords:Silicon Labs? fanout buffer? PCIe? data centre? server?

Silicon Labs has rolled out a portfolio of PCI Express (PCIe) Gen1/2/3 fanout buffers intended for data centre applications that include servers, storage and switches. The Si5310x/11x/019 PCIe buffer devices are aimed at leading x86 motherboard and server systems, and are offered with various choice of output count options, stated the company.


Silicon Labs' Si5310x/11x/019 family claims to provide equipment makers with lower power, standards-compliant PCIe buffer products qualified by the leading x86 CPU and chipset supplier and backed by an outstanding technical support organisation.

More than 90 per cent of existing motherboard designs use PCIe buffers based on constant-current output technology. To address this existing market need, Silicon Labs' Si53019 PCIe constant-current buffer delivers a fully qualified drop-in compatible solution with 30 per cent lower power than conventional solutions, the company noted.

To reduce power consumption, Silicon Labs' Si5310x and Si5311x devices use an innovative push-pull output architecture to deliver the industry's lowest power family of PCIe buffers, touted the company. These devices consume 60 per cent less power than constant-current buffers while reducing the required number of external resistors per output, significantly reducing external component count and simplifying PCB design. For example, by using Silicon Labs' 19-output Si53119 push-pull buffer instead of a conventional constant-current device, developers can save nearly 1W and eliminate 39 external components.

Silicon Labs' Si5310x and Si5311x push-pull output devices are also optimal PCIe timing solutions for system designs using ARM-based SoCs targeting the hyperscale server and storage markets. Similar to x86-based designs, ARM-based SoC platforms for the server and storage markets use PCIe as the primary system data bus and interconnect. With system-level power efficiency being a major benefit of the hyperscale architecture, the Si5310x and Si5311x push-pull output devices are geared for all server and storage platform designs, regardless of CPU architecture.

In addition to power consumption concerns, data centre equipment makers face the challenge of maintaining signal integrity while driving clocks between boards over cables up to 60in. A PCIe clock's rise and fall times degrade and slow down over such long distances, resulting in reduced jitter performance and increased system packet loss failures. Silicon Labs' PCIe Gen3 buffers are designed to drive long clock signal traces while maintaining standards-compliant PCIe rise and fall time specifications to prevent excessive jitter and packet loss.

Silicon Labs' PCIe buffer family includes 6, 8, 12, 15 and 19-output devices as well as a combination of constant-current and push-pull buffers, enabling developers to tailor the optimal solution for each application. Silicon Labs' devices are pin- and functionally compatible replacements for conventional PCIe buffers, providing developers with superior alternatives that improve power efficiency, signal integrity and jitter performance, the company added.

Samples and production quantities of the Si531xx and Si53019 PCIe fanout buffers are available. Pricing for the Si531xx push-pull output buffers begins at $1.70 in 10,000-unit quantities, and the Si53019 constant-current output buffer is priced at $2.85 in 10,000-unit quantities. To accelerate development of server and storage applications based on push-pull output clock buffers, Silicon Labs offers the Si53108-EK, Si53112-EK and Si53119-EK evaluation boards, each priced at $125.

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