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IBM claims PCM non-volatility not necessary

Posted: 19 Dec 2014 ?? ?Print Version ?Bookmark and Share

Keywords:PCM? non-volatility? IEDM? SCM? DRAM?

Optimising SET time?

Top of the list of essentials for any future PCM-SCMs is the need to optimise the performance-limiting SET operation, by reducing time and power. SET time is the longer of the two PCM write operations. The IBM paper will offer examples of three materials (A), (B), and (C) with (SET time nano-seconds/retention times in hours at 85C) of 3x102ns/106hrs, 1.3x102ns /2x105hrs and 50ns/2x103hrs, respectively. Clearly, if non-volatility is not a problem, then the material (C) would be the choice with only 2,000 hours of retention time at 85C.

Optimisation of the SET time has two parts: finding the best material composition and pulse shaping. To explore the latter, I extracted data from the groundbreaking piece of work by a team at IBM Zurich, on crystal growth rate in PCM structures [Ref 2 & 3]. From which, for the first time, it is now possible to link in a continuum SET time, elevated data retention, and the effects of vertical scaling for one composition. Two example curves are shown in Figure 2 covering the temperature range from the melting to temperature to below 85C for Ge2Sb2Te5. The curves shown are for a device with an inter-electrode spacing of 20nm and a second similar device vertically scaled to 10nm.

Figure 2

Clearly, optimisation, by minimising the SET time, will require pulse shaping and careful design of the SET pulse to maintain the temperature at the growing crystal interface close to that required for maximum crystal growth rate.

One possible problem might be related to the relatively small difference between the temperature for maximum crystal growth (750K) and the melting temperature of 877K. As illustrated in Figure 3, this would appear to require maintaining temperature up-gradient from the region of maximum crystal growth close to or at the melting temperature. This might require SET current values close to those required for reset with the addition of pulse shaping or profiling. At the moment, the impact of this on performance (i.e., write/erase endurance) and the power dissipation budget is unknown, but it is likely to be significant.

Figure 3

In [Ref 2] IBM indicated that it had other PCM materials that offered crystal growth rates that are faster than the Ge2Sb2Te5 material used for the results of Figure 2, without any disclosure of the composition or now, in the light of the SCM application proposition, the temperature for maximum crystal growth and the activation energy in the data retention regime.

The SCM IBM paper at IEDM 2014 considers single effects and performance characteristics that might give credibility to the claims for an SCM future for PCM, but it seems to ignore the fact that many of these are interacting variables. To link the list of the SCM essential structural and electrical characteristics in a single device and then in a commercial memory array will be challenging, time consuming, and require a significant amount of research-and-development time and money. There is just the possibility that a ReRAM device will be able to fulfil the requirement.

The paper author's position keeps PCM dreams alive but, like the proverbial curate's egg, it was only good in parts, "Although PCM will not replace any incumbent memories, with the successful introduction of PCM-based SCM, TCAM and neuromorphic memory, PCM will transform the future semiconductor landscape." (TCAM: Ternary Content Addressable Memory.)


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