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Benefits of fault-tolerant SoCs for automotive market

Posted: 09 Jan 2015 ?? ?Print Version ?Bookmark and Share

Keywords:ISO 26262? Functional safety? fault tolerance? SoC? CPU?

As the electronic processing capabilities of automobiles grows, more and more semiconductor companies are trying to enter the market.

Those who want to transition from the mobility or PC markets have a long journey ahead if they plan on entering the new segment with a design that meets all the required safety standards.

Fortunately, SoC developers can start this long journey with intermediate trips along the way.

By incorporating fault tolerant features within the SoC on-chip communications infrastructure, design teams do not have to bite off more than they can chew. They can implement measures that protect the data path first, which will then put themselves in a better position to reach the finish line and get their projects qualified.

Most design teams see the final destination as the ISO 26262 standard and then work backwards to try to meet its requirements, but that could make the journey fraught with frequent and unpredictable pit stops.

It is much better to design the product from the beginning with the intent of meeting functional safety requirements.

The ISO 26262 Specification
The title of the ISO 26262 standard is "Road vehicles C Functional safety."

Its purpose is to define processes to quantify the risk of hazardous operational situations in electronic and electrical safety-related systems.

An initial goal is to define safety measures and development processes that reduce the probability for systematic failures.

However, designers must also detect and control random hardware failures to mitigate the effects of those failures on human safety. Terms like "fault tolerance" and "resilience" are often used to describe the desired system response to safety-related system faults.

Designing for fault tolerance is the most important first step to reach ISO 26262.

It's also a proven way to reduce both design schedules and the time it takes to meet safety standards. Although safety is the ultimate goal, the initial focus should be to make the project more reliable and more resilient to withstand the harsh operating conditions that are seldom considered in consumer mobile devices.

Fault-tolerance is well understood in the in CPU portion of most SoCs and the features listed here are commonly used within them:
???Unit protection by duplication and redundancy C such as Dual-Core Lock Step (DCLS)
???Duplicate unit checkers and fault safety controller;
???Built in Self-Test (BIST) for resilience functions;
???Data protection by monitoring;
???Data packet integrity;
???Partitioning for resilient and non-resilient domains.

Protecting the whole SoC, not just the CPU
Unfortunately CPU-only safety is not enough because SoCs have become more complex with multiple sub-systems and interfaces.

Designers need end-to-end resilience across the entire SoC.

Some might fall into the trap of designing these these measures by themselves and incorporating them late in the development cycle. This is fraught with risk and could wreak havoc on schedules.

Fortunately there are some solutions available that enable greater SoC-wide resilience and fault tolerance out-of-the-box.

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