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Samsung reveals advanced mobile memory

Posted: 12 Jan 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Samsung? mobile memory? LPDDR3? LPDDR4? Internet of Things?

Samsung has recently unveiled the details of its work on advanced memories for mobile systems that include LPDDR4 DRAMs and a novel memory stack for wearable devices. According to the company, factors driving advanced mobile memory include the need to process high-quality video, increasing expectations for compute power in low-to-mid tier phones, and the expanding sensor-intensive Internet of Things.

Samsung launched a 20nm LPDDR4 4GB chip late last year. The 336b chip can handle data rates up to 3,200Mbs/s while consuming 1.1V. A 20nm LPDDR3 chip is also in production. Samsung officials did not comment on the future of mobile memory made in finer design rules.

Low power memory density is growing at a rapid rate, stated Samsung's Stephen Lum. The overall DRAM demand has skyrocketed as a result, with a 50 per cent growth in bits.

"We expect 11 different sensors in smartphones in 2015 that affects both working memory, DRAM and storage memory, eMMC," said Lum, a mobile memory group product marketing manager. "Higher res displays are getting more data, more pixels and you also need more bandwidth to process that," he added.

While the LPDDR4 chip received an honorary innovation award at CES, it won't make its way to flagship phones until later this year when Samsung partners ship devices now in development. LPDDR3 will remain the dominant memory in mid-and-low tier devices through 2016, Lum said.

Samsung previously said there is value in improving LPDDR3.

Samsung has developed a novel memory subsystem for the wearable category. The 12 x 12mm ePOP stack is in the first generation Galaxy Gear smartwatch and puts eMMC on top of LPDDR3 memory in a 4G+4Gb configuration to save board space and lower power use.

eMMC/ LPDDR3

"Things like wearable devices and thermostats have very limited space so you'll need innovative packaging, which is where Samsung really excels," Lum said.

ePop architecture

ePop architecture

In the previous generations, an applications processor would be connected to an embedded multichip package at its side. The ePOP stacks NAND and DRAM modules on top of the processor to create a smaller footprint memory subsystem. The challenge building such a stack is in dealing with heat dissipation, especially with temperature-sensitive NAND memory, Lum said.

Samsung is preparing for the transition from 32bit to 64bit chips, which has occurred faster in mobile than other markets.

"The big challenge is more memory is required in a 64bit operating system. The 32bit [OSes need] 4Gb DRAM and a 64bit OS will push beyond that 4Gb boundary to require 8Gb," Lum said.

- Jessica Lipsky
??EE Times





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