Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > EDA/IP
?
?
EDA/IP??

Design solutions accelerate design signoff, analysis

Posted: 29 Jan 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Cadence Design Systems? PCB extraction? signal integrity? power integrity? design?

Cadence Design Systems Inc. has announced the Sigrity Parallel Computing 4-pack and the Sigrity System Explorer as the latest additions to its Sigrity technology portfolio that claim to allow product creation efficiency by increasing signoff-level PCB extraction accuracy. Additionally, the company released an updated power-aware system signal integrity (SI) feature, as well as flexible purchasing options for PCB and IC package design and analysis.

"The Sigrity 2015 portfolio release of implementation-linked analysis solutions targets critical design goals for higher-speed and lower-power electronic products, especially relevant for mobile and Internet of Things markets," said Vinod Kariat, VP of R&D, custom IC and PCB group at Cadence. "Designers can utilise our new features to enable LPDDR4 sign-off along with simple yet cost-effective licensing for both distributed processing speed-up and multiple tool access by designers with a breadth of application needs."

The Sigrity Parallel Computing 4-pack is a license that enables designers to run parallel computing tasks across four additional computers, thereby accelerating product creation time and tripling the speed of PCB extraction of signoff-accurate interconnect models. On the other hand, the Sigrity System Explorer features general purpose topology exploration, enabling power-aware signal integrity and transient power integrity (PI) analysis across multiple fabrics.

The power-aware system SI feature now supports LPDDR4 analysis with full JEDEC compliance checking, including bit error rate analysis with high capacity channel simulation for memory interface.

Cadence is also announcing several product bundles that provide flexible licensing options for small analysis teams with big analysis requirements. These bundles include a combined license for Allegro Sigrity SI and Allegro Sigrity PI base products, when a single user is responsible for both SI and PI tasks; and a combined System SI license for both serial link and parallel bus analysis, when a single user is responsible for both memory interfaces and SerDes interfaces.





Article Comments - Design solutions accelerate design s...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top