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Optimising BGA signal routing in PCB designs

Posted: 02 Feb 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Ball grid array? BGA? printed circuit board? signal routing? vias?

Since BGA pad size is 0.3mm (12mils) and pitch is 0.4mm (16mils), a 6/10mil via (hole/annular ring size) is used in the pads. The same via is used for external extended fan-out. For the internal section, clearance between vias is 6 mils, which is standard and doesn't pose a problem at fabrication. For the external section, spacing between vias is 10 mils. This spacing is used to run a 3-mil trace with a 3.34-mil distance from the vias. This particular strategy allows all signals from a 0.4mm pitch micro BGA to be successfully fanned out without complying with any special fabrication requirements.

The basic steps remain the same whether using dog bone or via in pad, i.e. defining proper channel space. It includes defining via hole and pad size, trace width, impedance requirements and stackup. However the difference lies in via arrangement and the sets of vias that are used.

It is recommended that a blind/ buried via configuration up to six layers in depth be used. Going beyond causes fabrication yield issues. The preferred technique is to use staggered vias vs. stacked vias, as shown in figure 8. Staggered vias allow for more accurate registration tolerance as they're not mandated to align perfectly as required in the case of stacked vias.

Figure 8: Staggered vias allow for more registration tolerance, as they're not mandated to align perfectly as required in the case of stacked vias. (Courtesy of IPC).

What can go wrong by missing these steps

Manufacturing and functionality are two key aspects that need to be considered regardless of whether dog bone or via in pad is used. It's critical to know the manufacturing limits of the fab shop that will be used. There are shops that can manufacture extremely tight designs. However, if the product is going to volume production it gets very costly. It is therefore extremely important to design in a way that average manufacturing facilities can handle them.

To summarise, the key factors to consider from manufacturing perspective are
???Viahole size (depends on aspect ratio)
???Viaannular ring (min 3 mils is required)
???Viastacking (stacked vs staggered)
???Copper to copper space. (min 3 mil is recommended)
???Copper to drill space. (min 5 mil is required)
???BGA land size vs ball size for assembly.

There is always a trade-off when it comes to manufacturability vs functionality. It is critical to analyse each properly and make calculated decisions.

Functionality, on the other hand, includes signal integrity, power distribution, and EMC. These can be divided into several main categories:
???Reflection and transmission line (one line) Key is impedance control. Impedance is controlled by trace width, dielectric thickness and reference plane.
???Cross talk (two or more lines) Spacing between traces on same and adjacent layer is key to control cross talk. Having ground layers between each signal layer, and ground shield traces around noise sensitive or noise emitting traces help minimise cross talk.
???Power distribution (rail collapse) This is inductance of power nets. Having power and ground planes adjacent and decoupling caps helps control power surges.
???EMI (system collapse) The controlling of all above elements and shielding the entire PCB or noise sensitive and generating portion helps control EMI.

This is true for the entire product. However, this is particularly true at BGA areas where all signal and power come in close proximity to each other, thus making it challenging. Proper knowledge of signal characteristics help in making decisions as to which net has more priority in terms of functionality.

Having a solid ground plane in a layer adjacent to the BGA helps in tackling most signal integrity concerns. One critical benefit of blind vias is that the stub length is eliminated in blind/buried vias, and this is extremely important for high frequency signals.

The technology of BGA packaging for embedded designs is steadily advancing, but signal escape routing is difficult and challenging. Several major considerations are involved in selecting the correct fan-out/routing strategy: ball pitch, land diameter, number of I/O pins, via types, pad size, trace width and spacing, and stackup. Following the strategies outlined in this article ensures that a product is correct in terms of form, fit and function.

About the authors
Faisal Ahmed is a PCB layout engineer at NexLogic Technologies, Inc., San Jose, CA. His design and layout experience spans 14 years, with emphasis on mixed signal and HDI. He received his BS degree in Electronics from NED University of Engineering and Technology Karachi Pakistan.

Ishtiaq Safdar is a PCB layout engineer at NexLogic Technologies, Inc., San Jose, CA. He has been a board design and layout engineer for more than 10 years. He has extensive experience working on PCB designs populated with small packaging to include micro BGAs. He received his Bachelor of Engineering (BE) in industrial electronics from NED University of Engineering and Technology, Karachi, Pakistan.

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