Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > EDA/IP
?
?
EDA/IP??

Hua Hong develops 0.2?m RF SOI process design kit

Posted: 27 Feb 2015 ?? ?Print Version ?Bookmark and Share

Keywords:RF? SOI? PDK? Internet of Things?

Hua Hong Semiconductor Limited rolled out its 0.2m Radio Frequency (RF) Silicon On Insulator (SOI) process design kit (PDK), indicating the platform's successful validation. The PDK aims to support customers in terms of design and tape-out of high-quality RF components.

The 0.2m RF SOI technology platform is tailored and optimised for wireless RF front-end switch application. Compared with gallium arsenide (GaAs) and silicon-on-sapphire (SOS) alternatives, SOI provides excellent performance and scalability through a cost-effective process to quickly achieve the design targets and enhance the product competitiveness. It provides a 2.5V device with lower switch insertion loss, higher isolation and better linearity.

Hua Hong's PDK solution is developed from Cadence's IC5141 EDA software, and integrates RF modelling and simulation platform such as PSP SOI and BSIM SOI. This 0.2m RF SOI PDK offering provides convenience to designers who focus on optimising both the RF performance and die size. They could design and create high performance and low power wireless RF front-end switch, thereby minimising the revision of designs and greatly shortening the time for customers to launch their products in the market.

Dr. Weiran Kong, executive vice president of Hua Hong Semiconductor said, "The technology is ideal for RF switch designs such as smartphones and connected devices of Internet of Things."





Article Comments - Hua Hong develops 0.2?m RF SOI ...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top