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Addressing difficult thermal analysis problems

Posted: 10 Mar 2015 ?? ?Print Version ?Bookmark and Share

Keywords:application specific integrated circuits? ASICs? ASSPs? Thermal test chips? TTC?

It is rare that a thermal analysis would need to be performed on a die as small as 2.5mm x 2.5mm. For this reason, all of the cells on the wafer are interconnected, forming a wafer scale product. This is important because thermal modelling and measurement must be done with a die that closely approximated the size (mass) of the IC being simulated. The wafer scale product can then be sawn into any of hundreds of different die configurations, ranging from a single cell die (2.5mm x 2.5mm) up to an array die that is 10 cells by 10 cells (25.68mm x 25.68mm) or even larger, to obtain a size commensurate with the IC being simulated.

How it works
Metal film resistor heat sources were chosen for their better uniformity and matching across the wafer compared to polysilicon resistors. Additionally, their relatively stable temperature coefficients of 20ppm/C results in constant power dissipation over the course of the thermal measurement.

The heat sources are laid out to occupy 86% of the die area, thus conforming to the JESD51-4 standard. Each heat source has a pair of contacts for power connection and a second pair of contacts for Kelvin (e.g., 4-wire) connections to measure precisely the voltage being applied to the heat source.

Similarly, each of the temperature sensing diodes also have Kelvin connections, allowing one pair of connections to provide just enough forward current to operate the diode at the break of its forward current-voltage curve, while the second pair of connections can accurately measure the forward voltage. It is critical to keep the current below the point of self-heating, yet above the point that can cause problems with repeatability (figure 2a and 2b).

Figure 2a: Proper Measurement Current, IM, shown above, corresponds to the diode's forward current-voltage curve.

Figure 2b: Kelvin connections for the temperature sensing diodes (centre diode connected in this example)

Creating and configuring arrays of TTCs
There are two basic concepts in creating and configuring TTCs; uniform heating and distributed heating. Uniform heating implies that the heat source is consistent across the surface of the die, eliminating any thermal gradients across the silicon surface. To achieve this, the resistances in each TTC must be dissipate the same heat and therefore must be passing the same heating current. By configuring the TTCs in the correct series, parallel or series-parallel combination, uniform heating is achieved.

For example, figure 3 shows how the two heating elements in a TTC can be configured either in parallel (for a heater resistance of 3.8) or in series (for a heater resistance of 15.2).

Figure 3: Configuring a TTC.

Most chip designers strive to achieve an end product whose silicon die aspect ratio is 1:1. Occasionally this isn't possible due to I/O requirements (bonding pad locations). When an asymmetrical TTC array is needed, consideration should be given to the aspect orientation of the array. For example, thermal simulation of a die that is 13mm x 8mm can be achieved by using a TTC array that is 5 x 3 cells or 3 x 5 cells.

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