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Marvell pushes for FLC-MoChi approach

Posted: 19 Mar 2015 ?? ?Print Version ?Bookmark and Share

Keywords:FLC? MoChi? modular chip? scalable SoCs?

In a keynote speech at the Global CEO Summit in Shanghai, Weili Dai, president and co-founder at Marvell Technology Group, delivered the company's less memory-intensive computing system architecture, which is scalable from wearable devices to data centres.

The Summit takes place in conjunction with the International IC China Conference & Exhibition (IIC-China) Spring Conference.

Dai painted in broad strokes Marvell's Final-Level Cache (FLC) memories and a new interconnect technology called MoChi (modular chip). She described them as basic building blocks for the company's scalable SoCs.

Main memory hierarchy

Dai: FLC is redefining the main memory hierarchy.

Marvell's CEO Sehat Sutardja first presented the idea on FLC and MoChi at the international Solid-State Circuits Conference (ISSCC) last month. The approach, he said, can substantially reduce the amount of DRAM main memory needed in a system.

In a recent interview with EE Times, Sutardja also noted, "For the last 30 to 40 years, the computer system architecture has remained the same. The advancements of computers have always depended on the bigger and faster CPU and more memory." He promised, "We are going to fix it for once and all."

Now, taking that revolutionary concept developed by her husband Sutardja, Dai is running with it in China.

She said in her keynote that FLC is "redefining the main memory hierarchy," while MoChi is designed to "build chips in Lego-like format."

She explained that the FLC-MoChi approach will significantly reduce the "cost, power and size" of electronics systems!whether PC, server, smartphone or wearable.

Marvell plans to launch prototype chips!based on the MoChi interconnect and FLC memories!at the end of this year.

Breakthrough needed for longer battery life

In a speech entitled "'Smart Me' for Smart Life, Smart Lifestyle," Dai touched on the growing trend of always-on, context-aware smartphones and wearable devices. "The information between me and my smartphone is now going bidirectional," said the Marvell president. "My smartphone, which used to pick up only spotty data, is now capable of collecting all the data about me!where I am and what I am doing!through always-on sensors."

But for such fully bidirectional wearable devices to proliferate, "We need a breakthrough. On the dilemma of battery life, "we are still up against the wall," Dai said. Citing the recently launched Apple Watch, Dai observed, "Apple did a good job on the smart watch. But only 18 hours of battery life? That's a real bottleneck."

"Smart watches should last at least "weeks," she added.

Further, today's smart watch is generally designed as a sidekick for a smartphone. By leveraging the MoChi-FLC approach, she believes it's possible to develop a wearable device that can stand on its own.

Marvell believes the key to low power is the use of a fraction of DRAM in the main memory of a computing system, while putting DRAM in deep sleep.

Outdate computing architecture

Marvell thinks current computing architecture is outdated, as its progress has been too dependent on the faster CPU and more memory. (Source: Marvell)

Sutardja hit upon the FLC idea by hypothesising the possibility of caching only active processes in less DRAM, while leaving inactive processes in cheaper memory.


In Marvell's view, much needed is a revolutionary memory architecture called Final-Level Cache (FLC). (Source: Marvell)

According to Dai, the advantages of FLC are many. First, a computing system requires much smaller DRAM!roughly 1/8 of the DRAM in a conventional system. Second, it consumes about a quarter of the power a traditional computing system uses. Third, it promises high speed, and fourth, the FLC "can be co-located next to CPU," she explained. Also, it can be "easily flushed out to SSD for complete power down." Last but not the least, she added, it provides fast wake-up.

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