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Semicon manufacturing welcomes EUV lithography progress

Posted: 25 Mar 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Imec? EUV? lithography? TSMC? Imec?

Existing roadmaps pertaining to extreme ultraviolet (EUV) lithography could be in for a number of adjustments. In fact, the recent SPIE Advanced Lithography conference demonstrated a number of significant headway in EUV lithography that could possibly redefine how the process is performed.

After some years of very slow progress with the throughput and source power of the EUV scanners, we are seeing a sudden breakthrough that changed the outlook of many attendants.

TSMC was the source of the optimism. It's engineers reported they exposed 1,000 wafers in 24 hours on an ASML NXE:3300B equipped with an 80W light source. This is a watershed advance compared to last year, when even reaching a 10W power level seemed challenging.

TSMC has set up a pre-production experiment. Clearly, they have positioned themselves as a pioneer in EUV, with an ambition to insert EUV in N7 high-volume production, and retrofit it into N10 production. Seeing the advances with the power, that seems possible. However, the EUV scanners still need to improve their average uptime.

Looking at the presentations on EUV resists I didn't see a major breakthrough, only a slow evolution. There were some nice alternative approaches, but these will take more time to mature. It's becoming clear that some of the resist suppliers had put their development programs on the back burner in previous years. But now, with the progress made with the source power, they have to play catch-up and start coming up with good progress soon.

There was more optimistic news concerning masks, especially around mask inspection and defectivity, as more and more reliable data become available. Imec collaborated on a study which is developing an actinic blank inspection tool (ABI). Using our full field NXE:3100 EUV scanner, we exposed the masks made from the blanks that were inspected with the ABI tool, and correlated the defects in the resulting wafers to the defects found in the blanks. The results show that the new tool can indeed find all the critical blank defects.

Another highlight was the removable pellicle concept. It showed the successful demonstration of a poly-silicon pellicle developed in the previously by ASML is now available for early EUV adopters as a complete pellicle solution with support from ASML.

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