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Is resistive RAM the next NVM star?

Posted: 22 Apr 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Resistive RAM? DRAM? NAND? 16nm?

Oxygen vacancy hopping and Frenkel-Poole conduction mechanisms were early explanations for the switching behaviour, but recent reports suggest Redox reactions between the upper TaO1.43 layer and the overlying iridium electrode are responsible for the resistance change. We may not know the physical mechanism as to how the ReRAM works, but work it does.

There are perhaps limited opportunities for Adesto and Panasonic to scale their memory cells to smaller geometries. Adesto's use of Ag and GeS2 likely restricts their fabrication to the speciality foundry, Altis, who is fabricating the devices on a 130nm process. And Altis's product roadmap is not showing a smaller process node than the current 130nm. Adesto might be able to overcome this lithography limitation by running the front end processing through another foundry, using Altis to fabricate the Ag and GeS2 memory cell layers, and completing the wafer fabrication back at the first foundry. The logistics might be daunting, but doable.

Panasonic might have better options for a process shrink as their foundry partner, TowerJazz, has process offerings down to 45nm. And Panasonic has processor design and fabrication experience at the 45nm node with their MN2PS009 image processor used in the Olympus E-P3 camera, and at 32nm node with their MN2WS0150 HKMG processor. Designing a process shrink for MN101LR05D is well within their abilities.

Neither product is destined to become large-scale commodity memory, but their targets markets, IoT and portable systems, do not require this. The likes of Samsung, SK-Hynix, Toshiba and Micron would be the foundries most likely to produce ReRAM based commodity memory. By way of example, Samsung demonstrated a vertical resistance RAM (VRRAM) fabricated using a 3D process at the Electron Devices Meeting (IEDM) in 2011. A vertical structure was used to make these devices, having a vertical central TiN electrode, coated with a TaOX storage layer and surrounded by a W/TiN horizontal electrode. Horizontal electrodes are stacked one on top of the other to create the VVRAM structure. Samsung mentions the scalability of the VRAM to 32 or higher layers, which is quite plausible given the 39 metal gate layers used in their recently released 3D V-NAND Flash memory.

Micron and Sony, for their part, demonstrated a 16GB ReRAM at the 2014 ISSCC conference fabricated using a 27nm process with a 6F2 cell size. A dual-layer CuTe/insulator forms the resistive element. Sony has talked up the possibility of 16GB ReRAM storage-class memory product being ready in 2015.

So ReRAM is not quite ready for duty in our cell phones, but sometime soon they will show up, and in the meantime TechInsights will continue to tear down the latest cell phones in hopeful expectation.

- Kevin Gibb
??EE Times/product line manager for Process

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