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Connecting passive components to logic gates

Posted: 14 May 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Digital gates? transistors? CMOS? PWM? voltage-controlled oscillator?

The tank circuit in figure 7 uses an adjustable (ferrite slug tuned) 396nH inductor in parallel with a 1nF C0G (aka NP0) capacitor, and is loosely coupled to the TTL source through a 68 pF capacitor. It is not built on copperclad board or a PCB; the components are lying on the benchtop with their leads soldered together in the air. The inductor Q is spec'd on the data sheet about 88 at 40MHz, so its Q (RF resistance/reactance) will be somewhat higher at the resonant frequency here of 8MHz. The capacitor ratio depends on inductor Q (generally the capacitor Q is much better than the inductor Q), driver rise time, desired sine wave level, and following amplifier gain to restore the sine wave zero crossing to a digital edge.

In this case, for demonstration purposes the amplifier is represented by the oscilloscope, and the logic source is the TTL output of a function generator terminated into a 75 cable and 75 resistive load. Due to limitations of the function generator, the duty cycle is actually 48 per cent, not the ideal 50 per cent.

The 8MHz resonant frequency is derived from the formula f = 1/(2πLC). But, the scope display in figure 9 shows a frequency of the triggering yellow edges of 1.6MHzone fifth of the tank sine wave's frequency. This circuit is performing as a x5 frequency multiplier, and, in practice, odd harmonics up to the 11th or more are achievable depending on inductor Q. (I say 11th because that is the highest I've ever attempted.)

Figure 9: A series of yellow edges at about 50% duty cycle result in continued blue ringing if the edges are timed properly.

There's something else about the phase relationship between the driving edges and the sine wave peaks. The rising edge correlates with the positive peak, the falling edge with the negative peak. Therefore an even harmonic cannot be picked off of a 50 per cent square wavethe alternating edges would cancel the same-polarity sine peaks. (Mr. Fourier was right!)

But with a slight shift in the edge duty cycle we can make the sine peaks line up again at an even harmonic, such as the x6 multiplier in figure 10.

Figure 10: Here we have a 40% duty cycle 1.333MHz digital signal exciting the 6th harmonic, again at 8MHz for demo purposes because I didn't want to mess with re-tuning the tank.

Figures 11 and 12 show how the harmonic multiplication factor changes as the duty cycle changes. The ringing frequency is still constant at 8MHz since the tank component values have not been changed, but now the rectangular wave frequencies are at the sub-multiples of 1/7 (1.14MHz) and 1/8 (1MHz) of 8MHz respectively.

Figure 11: A 35% duty cycle rings the 7th harmonic of a 1.14MHz rectangular wave.

Figure 12: A 31% duty cycle rings the 8th harmonic of a 1MHz rectangular wave.

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