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UMC, ARM bare 55nm IP platform for IoT apps

Posted: 20 May 2015 ?? ?Print Version ?Bookmark and Share

Keywords:IP platform? wearables? internet of Things? SoC? IoT?

ARM and United Microelectronics Corp. (UMC), the world's second-largest chip foundry, announced the availability of an ARM Artisan physical IP platform on 55nm, aimed at speeding development of embedded systems and Internet of Things (IoT) device.

UMC is targeting its 55nm ultra-low-power (ULP) technology for energy-efficient IoT applications. The new physical IP offering will help chip design teams accelerate and simplify the implementation of ARM-based SoC (system-on-chip) designs for IoT and other embedded applications, the companies said in a press statement.

The technology is targeted at wearable devices, UMC spokesman Richard Yu said. Wearables need ULP technology to prolong battery life because wearable products and sensors are in an "always on" status, Yu said.

The Artisan physical IP platform is expected to help enhance UMC's ULP technology to maximise power efficiency and reduce leakage, the companies said. Features such as thick gate oxide support and long, multi-channel library options are expected to give SoC designers multiple tools to help optimise IoT applications.

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A physical IP foundation platform at UMC's 55ULP process technology is vital in enabling low-power and cost-sensitive designs for emerging IoT applications, according to Will Abbey, a general manager with ARM's physical design group.

"By delivering libraries optimised with features targeting power-efficiency, ARM and UMC are providing SoC designers with a comprehensive set of new tools," Abbey said in a press statement.

The Artisan libraries will support the 0.9V ultra-low voltage domain, thereby saving up to 44 per cent dynamic power and 25 per cent leakage power when compared with 1.2V domain operation

Artisan includes multi-channel libraries with multiple Vts to provide SoC designers leakage and performance options. Long channel libraries can be used to further reduce leakage by up to 80 per cent. A power management kit enables both active and leakage power mitigation.

Artisan's thick gate oxide library will offer reduced leakage (350x lower than regular standard cells, says press release) for always-on cells. The ability of this library to interface with higher voltages (including battery voltages used in IoT devices) can also offer the advantage of negating the need for a voltage regulator.

Next generation high-density memory compilers offer multiple integrated power modes to save state while minimise EEOL_2015MAY20_POW_NP_01ing standby leakage. Using these modes will enable SoC designers to realise up to 95 per cent lower leakage when compared to regular standby, say the company's press release.

- Allan Patterson
??EE Times U.S.





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